Abstract: A computer system manages storage of data and associated management and/or control information. The system logically divides the storage into a plurality of address spaces with common addressing within each of the address spaces. In response to a request for a block of storage, the system allocates a block of storage at an address from one of the address spaces. The system also reserves another block of storage from another of the address spaces at the same address within the other address space to store corresponding management and/or control information. Next, data is written to the requested block of storage in the one address space, and management and/or control information is written to the other block in the other address space. Thus, the management and/or control information is not confined to the block which contains the actual data.

Abstract: A synchronous interrupt handler for a processing system executing multiple modes of operation employs a minimum number of lines of interrupt handler code written to execute at the "zeroth" level, is combined with a virtualized interrupt vector table. An identical zeroeth level handler is inserted at each of the processor's interrupt vector entry pints. These short code sequences are the first to gain control following an interrupt. They are handwritten in the platform's native instruction set to be mode-independent. For example, if the platform's processor does not alter the "endianness" of the machine state following an interrupt, the "zeroeth level" code must be written for endian neutrality; likewise, for 32/64-bit mode, etc. For each mode of operation, there is created a Virtualized Vector Table to represent the proper interrupt handlers for each physical interrupt level. Each task data structure, implicitly reflecting its unique mode of operation, contains a pointer to its virtualized vector table.