Abstract: A coverage analysis process and apparatus assigns a unique label for every unique cycle of data produced by simulation or testing. The labels are substituted for the signal evaluations producing a graph of labels over time. The coverage analysis then generates a function, which represents the graph and the function is stored. The functions are analyzed and compared to determine coverage information. The coverage analysis process and apparatus provides significant data compression and represents the coverage in a form, which can easily be analyzed and compared.

Abstract: A method of verifying a digital circuit in which state transition information is extracted from the output of a non-formal first verification technique. A formal verification tool is then applied to the extracted state transition information to extend the verification coverage of the digital circuit beyond the coverage that is achieved using the first verification technique. In one embodiment, the method includes the initial step of applying a first verification technique such as a simulation technique to a model of the digital circuit. In the preferred embodiment, the application of the formal verification tool comprises applying a model checker to the extracted state transition data to achieve a formal verification of the state machine represented by the state transition diagram. In one embodiment, the extracted state transition information includes a set of data points each representing a present state, a present input, and a next state.

Abstract: A high performance voice transformation apparatus and method is provided in which voice input is transformed into a symbolic representation of phonemes in the voice input. The symbolic representation is used to retrieve output voice segments of a selected target speaker for use in outputting the voice input in a different voice. In addition, voice input characteristics are extracted from the voice input and are then applied to the output voice segments to thereby provide a more realistic human sounding voice output.

Abstract: A method for automatically generating a set of specifications against which a model of the digital circuit can be verified. In one embodiment, the method includes an initial step in which a specification class that corresponds to a type of behavior of the digital circuit is defined. A set of specification formulae that satisfies the defined specification class is then enumerated. Each formula in the set of formulae is then applied to the model of the digital circuit to determine whether the digital circuit satisfies the corresponding formula. The definition of the specification class preferably includes a set of input conditions, a set of output or response conditions, and a temporal component. Preferably, the enumeration of the specification formulae includes all specification formulae that satisfy the specification class. The application of the set of formulae to the model of the digital circuit is preferably achieved with a verification engine such as a model checker.

Abstract: A system and method for compressing data on a computer system is disclosed. The method and system include separating the data into a plurality of segments. The plurality of segments includes a plurality of unique segments. The method and system also include providing a plurality of code words. Each of the plurality of code words corresponds to a unique segment of the plurality of unique segments. The method and system also include providing a representation of the data. The representation includes the plurality of code words for the plurality of segments. The plurality of code words in the representation replaces the plurality of segments. As a result, the data in the representation could be accessed randomly.

Abstract: A method for characterizing average performance in a data processing system is provided. This method consists of adding meta-tool level variables to a verification tool. These meta-tool variables keep track, at once, of all concurrent streams of execution that the tool is considering in its reachability analysis. The image of an initial state variable is found and then divided into a frontier of new states and a set of previously reached states. The previously reached states are ignored and the image of the frontier is found. This process continues until the frontier is empty and all possible states have been reached. In one embodiment of the present invention, the probabilities of the paths can be considered by sampling and holding input data using SMV (a model checking tool) variables.

Abstract: An apparatus performs a process for partitioning a netlist. The process picks a unique color for each clock and traverses the clock tree coloring the latches in support of that clock tree with that color. The process then colors the fanout logic cones for each latch and notes any coloring collisions. In the case of a multicolored gate, the process retimes the network by moving the terminating latch backwards, towards the collision, to enable single coloring of the gate. The process then performs a depth-first search on the fanout logic of each primary input to the first latch encountered or a primary output. If a primary output is encountered, the path is colored with a color representing the free-run domain. Otherwise, the process colors the path with the color of the terminating latch. Next, the process duplicates the fanin cones for remaining multicolored gates so that a copy of the logic can be incorporated with each independent domain.

Abstract: A system and method for compressing state transition data on a computer system is disclosed. The method and system include separating the state transition data into a plurality of segments and separating each of the plurality of segments into a plurality of subsegments. The method and system further include providing a plurality of code words. Each of the plurality of code words corresponds to a unique subsegment of the plurality of unique subsegments. The method and system also include providing a representation of each segment. The representation of each segment includes a portion of the plurality of code words. The portion of the plurality of code words replaces the plurality of subsegments in each of the plurality of segments. Thus, the present invention allows compressed state transition data to be used without full uncompression, allowing a system to be explicitly checked without substantial loss of information and without consuming memory.

Abstract: A method for compressing files utilizing a dictionary within a data-processing system is disclosed. A binary file commonly available to a data-compressing system during compression and to a data-decompressing system during decompression can be served as a dictionary file. A first dictionary array is initially generated utilizing the dictionary file. Each entry within the first dictionary array includes a set of unique bit patterns from the dictionary file. An input file is parsed into multiple blocks, with each block having the same length as each entry within the first dictionary array. The input file is then compared against the first dictionary array, and each entry within the first dictionary array that includes the same bit patterns as a block from the input file is marked accordingly. A second dictionary array that includes all the marked entries from the first dictionary array is subsequently generated, and this second dictionary array is utilized in the compression of the input file.