Abstract: A communication power distribution system including a single power regulator which feeds a plurality of transmission lines current limited by corresponding active current limiters.

Abstract: An active current limiter controls the flow of current between a power source and a load. The active current limiter includes a power switch coupled between the power source an the load, a current sensor coupled between the power source and the load to sense the level of current flow through the power switch, and one or more fault detection circuits coupled to the current sensor for sensing one or more current fault conditions between the power source and the load and configured to switch of the power switch when a current fault condition is detected.

Abstract: A substrate (10) of a semiconductor device includes a power section (12) and a control section (14). The power section includes doped regions (16, 18, 20) and terminals (22, 24, 26) which define power devices such as transistors or SCRs. The control region also includes doped areas including a parasitic collector (32). A minority carrier current (62) flows from the doped regions of the power section to the collector of the control section when the power device to substrate junction is forward-biased. A self-biased moat assembly (40) includes a first doped region (42) between the doped regions of the power and control sections under which the parasitic minority carrier current flows. An electrical connection (46) connects the moat first doped region (42) with a moat second doped region (44). The self-biased moat assembly is isolated from ground such that it is self-biased negative in accordance with internal operating conditions of the semiconductor device.

Abstract: A communication power distribution system including a single power regulator which feeds a plurality of transmission lines current limited by corresponding active current limiters.

Abstract: A substrate (10) of a semiconductor device includes a power section (12) and a control section (14). The power section includes doped regions (16, 18, 20) and terminals (22, 24, 26) which define power devices such as transistors or SCRs. The control region also includes doped areas including a parasitic collector (32). A minority carrier current (62) flows from the doped regions of the power section to the collector of the control section when the power device to substrate junction is forward-biased. A moat assembly (40) includes a first doped region (42) between the doped regions of the power and control sections. An electrical connection (46) connects the moat first doped region (42) with a moat second doped region (44). The self-biased moat assembly is isolated from ground such that it is self-biased negative in accordance with internal operating conditions of the semiconductor device. The minority charge carriers are collected by the moat first doped region.