Patents by Inventor Steven M. Lardizabal
Steven M. Lardizabal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11979129Abstract: Apparatus and associated methods relate to a low-noise wideband active phase shifter. The low-noise wideband active phase shifter includes first and second transconductance cells, a fixed LC series network and a tunable LC series network configured to form an all-pass lattice network. The first and second transconductance cells, each include a transistor, a feedback network, and a transistor biasing network. The transistor has an input terminal and an output terminal. The negative feedback network electrically couples the input and output terminals of the transistor. The biasing network provides input and output biasing of the transistor. The fixed LC series network connects between the first and the second transconductance cells. The tunable LC series network connects between the first and the second transconductance cells.Type: GrantFiled: January 18, 2022Date of Patent: May 7, 2024Assignee: RAYTHEON COMPANYInventor: Steven M. Lardizabal
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Publication number: 20230231542Abstract: Apparatus and associated methods relate to a low-noise wideband active phase shifter. The low-noise wideband active phase shifter includes first and second transconductance cells, a fixed LC series network and a tunable LC series network configured to form an all-pass lattice network. The first and second transconductance cells, each include a transistor, a feedback network, and a transistor biasing network. The transistor has an input terminal and an output terminal. The negative feedback network electrically couples the input and output terminals of the transistor. The biasing network provides input and output biasing of the transistor. The fixed LC series network connects between the first and the second transconductance cells. The tunable LC series network connects between the first and the second transconductance cells.Type: ApplicationFiled: January 18, 2022Publication date: July 20, 2023Inventor: Steven M. Lardizabal
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Publication number: 20230208364Abstract: Methods and apparatus for an amplifier including first and second transistors coupled in a stacked configuration with first and second current mirrors to provide respective bias signals to the amplifier transistors. A reference transistor is coupled to the first and second current mirrors for referencing the bias signals together.Type: ApplicationFiled: December 28, 2021Publication date: June 29, 2023Applicant: Raytheon CompanyInventors: John P. Bettencourt, Valery S. Kaper, Steven M. Lardizabal
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Patent number: 11205953Abstract: A power converter assembly is provided and includes high quality factor (Q) shield-to-transistor integrated low-inductance capacitor elements to divert common mode (CM) currents, high Q shield-to-shield integrated low-inductance capacitor elements to compliment line-to-line filter capacitors and high Q baseplate integrated low-inductance capacitor elements to attenuate residual CM currents.Type: GrantFiled: January 13, 2020Date of Patent: December 21, 2021Assignee: RAYTHEON COMPANYInventors: Boris S. Jacobson, Steven D. Bernstein, Steven M. Lardizabal, Jason Adams, Jeffrey R. Laroche
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Publication number: 20210273558Abstract: A power converter assembly is provided and includes high quality factor (Q) shield-to-transistor integrated low-inductance capacitor elements to divert common mode (CM) currents, high Q shield-to-shield integrated low-inductance capacitor elements to compliment line-to-line filter capacitors and high Q baseplate integrated low-inductance capacitor elements to attenuate residual CM currents.Type: ApplicationFiled: January 13, 2020Publication date: September 2, 2021Inventors: Boris S. Jacobson, Steven D. Bernstein, Steven M. Lardizabal, Jason Adams, Jeffrey R. Laroche
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Patent number: 10566896Abstract: A power converter assembly is provided and includes high quality factor (Q) shield-to-transistor integrated low-inductance capacitor elements to divert common mode (CM) currents, high Q shield-to-shield integrated low-inductance capacitor elements to compliment line-to-line filter capacitors and high Q baseplate integrated low-inductance capacitor elements to attenuate residual CM currents.Type: GrantFiled: August 6, 2018Date of Patent: February 18, 2020Assignee: RAYTHEON COMPANYInventors: Boris S. Jacobson, Steven D. Bernstein, Steven M. Lardizabal, Jason Adams, Jeffrey R. Laroche
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Patent number: 10447208Abstract: A circuit having (A) a transistor; (B) a bias circuit for providing setting a bias current for the transistor, the bias current having a current level in accordance with a reference current fed to the bias circuit; and (C) a bias current level controller, comprising: (i) a plurality of switches, each one of the switches comprises: a MOS FET and a GaN FET connected in a cascode configuration; and (ii) current source circuitry, comprising a plurality of current sources, each one of the current sources being connected between a voltage source and a corresponding one of the plurality of switches, the current source circuit combining currents produced by the current source in response a binary control signal fed to a gate of the MOS FET, the combined current providing the reference current fed to the bias circuit.Type: GrantFiled: December 15, 2017Date of Patent: October 15, 2019Assignee: Raytheon CompanyInventors: John P. Bettencourt, Valery S. Kaper, Steven M. Lardizabal
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Patent number: 10340812Abstract: A modular high-power converter system includes an electronic power distribution unit configured to output an analog current (AC) voltage to a power bus, and at least one Transmit or Receive Integrated Microwave Module (T/RIMM) that includes a voltage converter unit and a transmitter and receiver (T/R) unit. The voltage converter unit includes at least one analog-to-digital converter (ADC) to convert the AC voltage into a direct current (DC) voltage having a first DC voltage level. The transmitter and receiver (T/R) unit includes a modular-based DC/DC converter to convert the DC voltage into a second DC voltage having a second voltage. The modular-based DC/DC converter includes a modular power converter unit configured to generate the second DC voltage. The modular converter unit is configured to be independently interchangeable with a different modular converter unit.Type: GrantFiled: September 13, 2017Date of Patent: July 2, 2019Assignee: RAYTHEON COMPANYInventors: Boris S. Jacobson, Steven D. Bernstein, Steven M. Lardizabal, Jason Adams, Jeffrey R. Laroche
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Publication number: 20190190456Abstract: A circuit having (A) a transistor, (B) a bias circuit for providing setting a bias current for the transistor, the bias current having a current level in accordance with a reference current fed to the bias circuit; and (C) a bias current level controller, comprising: (i) a plurality of switches, each one of the switches comprises: a MOS FET and a GaN FET connected in a cascode configuration; and (ii) current source circuitry, comprising a plurality of current sources, each one of the current sources being connected between a voltage source and a corresponding one of the plurality of switches, the current source circuit combining currents produced by the current source in response a binary control signal fed to a gate of the MOS FET, the combined current providing the reference current fed to the bias circuit.Type: ApplicationFiled: December 15, 2017Publication date: June 20, 2019Applicant: Raytheon CompanyInventors: John P. Bettencourt, Valery S. Kaper, Steven M. Lardizabal
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Publication number: 20190149039Abstract: A power converter assembly is provided and includes high quality factor (Q) shield-to-transistor integrated low-inductance capacitor elements to divert common mode (CM) currents, high Q shield-to-shield integrated low-inductance capacitor elements to compliment line-to-line filter capacitors and high Q baseplate integrated low-inductance capacitor elements to attenuate residual CM currents.Type: ApplicationFiled: August 6, 2018Publication date: May 16, 2019Inventors: Boris S. Jacobson, Steven D. Bernstein, Steven M. Lardizabal, Jason Adams, Jeffrey R. Laroche
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Publication number: 20190081567Abstract: A modular high-power converter system includes an electronic power distribution unit configured to output an analog current (AC) voltage to a power bus, and at least one Transmit or Receive Integrated Microwave Module (T/RIMM) that includes a voltage converter unit and a transmitter and receiver (T/R) unit. The voltage converter unit includes at least one analog-to-digital converter (ADC) to convert the AC voltage into a direct current (DC) voltage having a first DC voltage level. The transmitter and receiver (T/R) unit includes a modular-based DC/DC converter to convert the DC voltage into a second DC voltage having a second voltage. The modular-based DC/DC converter includes a modular power converter unit configured to generate the second DC voltage. The modular converter unit is configured to be independently interchangeable with a different modular converter unit.Type: ApplicationFiled: September 13, 2017Publication date: March 14, 2019Inventors: Boris S. Jacobson, Steven D. Bernstein, Steven M. Lardizabal, Jason Adams, Jeffrey R. Laroche
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Patent number: 9634703Abstract: A method and receiver for detecting a signal wherein the signal is encoded the signal with a pair of spaced predetermined frequencies and wherein energy is detected in each of the pair of predetermined frequencies and in a predetermined frequency between the pair of predetermined frequencies. Energy detected in each of the pair of predetermined frequencies is compared with the energy detected in the predetermined frequency between the pair of predetermined frequencies. The detecting includes passing the encoded signal through narrow band filters, each one of the filters being tuned to a corresponding one of the pair of predetermined frequencies and the predetermined frequency between the pair of predetermined frequencies.Type: GrantFiled: July 29, 2015Date of Patent: April 25, 2017Assignee: RAYTHEON COMPANYInventors: Zhaoyang C. Wang, Steven M. Lardizabal
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Publication number: 20170033817Abstract: A method and receiver for detecting a signal wherein the signal is encoded the signal with a pair of spaced predetermined frequencies and wherein energy is detected in each of the pair of predetermined frequencies and in a predetermined frequency between the pair of predetermined frequencies. Energy detected in each of the pair of predetermined frequencies is compared with the energy detected in the predetermined frequency between the pair of predetermined frequencies. The detecting includes passing the encoded signal through narrow band filters, each one of the filters being tuned to a corresponding one of the pair of predetermined frequencies and the predetermined frequency between the pair of predetermined frequencies.Type: ApplicationFiled: July 29, 2015Publication date: February 2, 2017Applicant: RAYTHEON COMPANYInventors: Zhaoyang C. Wang, Steven M. Lardizabal
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Patent number: 7387958Abstract: A method includes providing a single crystal wafer having MMIC chips. Each chip has an active device in a first surface portion of a semiconductor substrate provided by the wafer and an electrical interconnect having a first portion disposed on a second surface of the semiconductor substrate. The semiconductor substrate structure has a via therethrough, a second portion of the electrical interconnect passing though the via and being electrically connected to the active device. A multilayer interconnect structure is formed on the wafer providing a signal routing section on the second surface portion of a corresponding one of the chips. Each section has dielectric layers and an electrical conductor, such electrical conductor being electrically coupled to the active device to route an electrical signal to such active device. Each chip and the corresponding signal routing section are separated from the wafer.Type: GrantFiled: July 8, 2005Date of Patent: June 17, 2008Assignee: Raytheon CompanyInventors: Christopher P. McCarroll, Jerome H. Pozgay, Steven M. Lardizabal, Thomas E. Kazior, Michael G. Adlerstein
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Patent number: 6439763Abstract: A radiometer calibrating system utilizes an adjustable noise source for calibrating a radiometer. The noise source includes a transistor configured as a noise equivalent circuit having a gate port, drain port and source port. A source inductance providing series feedback for the noise source has one end coupled to the source port of the noise equivalent circuit and another end connected to the ground. A bias circuit controls the amount of DC bias applied to the noise equivalent circuit. In order to match the impedances in the noise source, an output impedance matching network is connected to the drain port and an input impedance matching network is connected to the gate port of the noise equivalent circuit. The output and input impedance networks have an output port and input port, respectively.Type: GrantFiled: February 8, 2001Date of Patent: August 27, 2002Assignee: Raytheon CompanyInventors: Robert S. Roeder, Matthew C. Smith, Lawrence P. Dunleavy, Steven M. Lardizabal
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Publication number: 20010019572Abstract: A radiometer calibrating system utilizes an adjustable noise source for calibrating a radiometer. The noise source includes a transistor configured as a noise equivalent circuit having a gate port, drain port and source port. A source inductance providing series feedback for the noise source has one end coupled to the source port of the noise equivalent circuit and another end connected to the ground. A bias circuit controls the amount of DC bias applied to the noise equivalent circuit. In order to match the impedances in the noise source, an output impedance matching network is connected to the drain port and an input impedance matching network is connected to the gate port of the noise equivalent circuit. The output and input impedance networks have an output port and input port, respectively.Type: ApplicationFiled: February 8, 2001Publication date: September 6, 2001Inventors: Robert S. Roeder, Matthew C. Smith, Lawrence P. Dunleavy, Steven M. Lardizabal
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Patent number: 6217210Abstract: A radiometer calibrating system utilizes an adjustable noise source for calibrating a radiometer. The noise source includes a transistor configured as a noise equivalent circuit having a gate port, drain port and source port. A source inductance providing series feedback for the noise source has one end coupled to the source port of the noise equivalent circuit and another end connected to the ground. A bias circuit controls the amount of DC bias applied to the noise equivalent circuit. In order to match the impedances in the noise source, an output impedance matching network in connected to the drain port and an input impedance matching network is connected to the gate port of the noise equivalent circuit. The output and input impedance networks have an output port and input port, respectively.Type: GrantFiled: August 23, 1999Date of Patent: April 17, 2001Assignees: Raytheon Company, University of South FloridaInventors: Robert S. Roeder, Matthew C. Smith, Lawrence P. Dunleavy, Steven M. Lardizabal