Abstract: An aspect includes determining, via a processor, context attributes of a storage. Data address translation (DAT) tables are created, via the processor, to map virtual addresses to real addresses within the storage. When detecting, via the processor, that a context attribute of the storage has changed, and the DAT tables are updated based at least in part on the changed context attributes of the storage.

Abstract: Systems, methods, and computer-readable media are described for utilizing breakpoint value-based fingerprints of failing regression test cases to determine specific components of a System Under Test (SUT) that are causing a fault such as specific lines of source code. A failing test case from a regression run is selected and fault localization and inverse combinatorics techniques are employed to generate a set of failing test cases around the selected failing test case. A set of test fingerprints corresponding to the set of failing test cases is compared to a set of test fingerprints corresponding to a set of passing test cases to determine breakpoints that are indicated as being encountered during execution of at least one failing test case and that are not encountered during execution of any of the passing test cases. Specific lines of source code that correspond to these breakpoints are then identified as causing the fault.

Abstract: A non-limiting example computer-implemented method includes receiving instructions to switch an operational context of a dynamic address translation (DAT) structure to a new operational context. It is determined if context switching has been enabled within the DAT structure. Based on determining that context switching is enabled, it is determined if the new operational context of the DAT structure is different than a current operational context of the DAT structure. It is chosen whether to switch to a full operational context based on the new operational context being different than the current operational context. If the full operational context is used, a full space DAT structure is set up and a private space bit is set to OFF, and if the full operational context is not used, a partial space DAT structure is set up and the private space bit is set to ON.

Abstract: A computer-implemented method for switching between a full space and a subspace across multiple address spaces is described. A non-limiting example of the computer-implemented method includes determining, by a processor, that switching between the full space and the subspace is enabled by examining a bit in a control register. The method determines, by the processor, that there is a new context different from an existing context based on the bit in the control register indicating that switching is enabled and switches, by the processor, the context of the multiple spaces based on determining that the new context is different from the existing context.

Abstract: An aspect includes determining, via a processor, context attributes of a storage. Data address translation (DAT) tables are created, via the processor, to map virtual addresses to real addresses within the storage. When detecting, via the processor, that a context attribute of the storage has changed, and the DAT tables are updated based at least in part on the changed context attributes of the storage.

Abstract: A computer-implemented method for implementing a full space dynamic address translation (“DAT”) structure and a subspace DAT structure is provided. A non-limiting example of the computer-implemented method includes determining, by a processor, that switching between the full space DAT structure and the subspace DAT structure is enabled by examining a bit in a control register. The method determines, by the processor, that there is a new context different from an existing context based on the bit in the control register indicating that switching is enabled, and switches, by the processor, the context of the DAT structures based on determining that the new context is different from the existing context.

Abstract: An aspect includes determining, via a processor, context attributes of a storage. Data address translation (DAT) tables are created, via the processor, to map virtual addresses to real addresses within the storage. When detecting, via the processor, that a context attribute of the storage has changed, and the DAT tables are updated based at least in part on the changed context attributes of the storage.

Abstract: An aspect includes determining, via a processor, context attributes of a storage. Data address translation (DAT) tables are created, via the processor, to map virtual addresses to real addresses within the storage. When detecting, via the processor, that a context attribute of the storage has changed, and the DAT tables are updated based at least in part on the changed context attributes of the storage.

Abstract: A computer-implemented method for switching between a full space and a subspace across multiple address spaces is described. A non-limiting example of the computer-implemented method includes determining, by a processor, that switching between the full space and the subspace is enabled by examining a bit in a control register. The method determines, by the processor, that there is a new context different from an existing context based on the bit in the control register indicating that switching is enabled and switches, by the processor, the context of the multiple spaces based on determining that the new context is different from the existing context.

Abstract: A non-limiting example computer-implemented method includes receiving instructions to switch an operational context of a dynamic address translation (DAT) structure to a new operational context. It is determined if context switching has been enabled within the DAT structure. Based on determining that context switching is enabled, it is determined if the new operational context of the DAT structure is different than a current operational context of the DAT structure. It is chosen whether to switch to a full operational context based on the new operational context being different than the current operational context. If the full operational context is used, a full space DAT structure is set up and a private space bit is set to OFF, and if the full operational context is not used, a partial space DAT structure is set up and the private space bit is set to ON.

Abstract: A computer-implemented method for implementing a full space dynamic address translation (“DAT”) structure and a subspace DAT structure is provided. A non-limiting example of the computer-implemented method includes determining, by a processor, that switching between the full space DAT structure and the subspace DAT structure is enabled by examining a bit in a control register. The method determines, by the processor, that there is a new context different from an existing context based on the bit in the control register indicating that switching is enabled, and switches, by the processor, the context of the DAT structures based on determining that the new context is different from the existing context.

Abstract: Systems, methods, and computer-readable media are described for utilizing breakpoint value-based fingerprints of failing regression test cases to determine specific components of a System Under Test (SUT) that are causing a fault such as specific lines of source code. A failing test case from a regression run is selected and fault localization and inverse combinatorics techniques are employed to generate a set of failing test cases around the selected failing test case. A set of test fingerprints corresponding to the set of failing test cases is compared to a set of test fingerprints corresponding to a set of passing test cases to determine breakpoints that are indicated as being encountered during execution of at least one failing test case and that are not encountered during execution of any of the passing test cases. Specific lines of source code that correspond to these breakpoints are then identified as causing the fault.

Abstract: Provided herein is a computer-implemented method. The computer-implemented method includes updating, by a processor, a value of a delta field of an entry of a data structure indexed for the processor. The computer-implemented method also includes comparing, by the processor, a predefined threshold for a global field corresponding to the delta field and the value of the delta field. The computer-implemented method also includes rolling, by the processor, the value of the delta field into the global field when an absolute value of the value of the delta field meets or exceeds the predefined threshold for the global field. Note that the data structure is stored in a first area of a memory in communication with the processor that is separate from a second area of the memory storing the global field.

Abstract: Provided herein is a computer-implemented method. The computer-implemented method includes updating, by a processor, a value of a delta field of an entry of a data structure indexed for the processor. The computer-implemented method also includes comparing, by the processor, a predefined threshold for a global field corresponding to the delta field and the value of the delta field. The computer-implemented method also includes rolling, by the processor, the value of the delta field into the global field when an absolute value of the value of the delta field meets or exceeds the predefined threshold for the global field. Note that the data structure is stored in a first area of a memory in communication with the processor that is separate from a second area of the memory storing the global field.

Abstract: A computer-implemented method includes pseudo-invalidating a first Dynamic Address Translation (DAT) table of a DAT structure associated with a workload. A page fault occurring during translation of a virtual memory address of data required by the workload is detected. Responsive to the page fault, the DAT structure is traversed. The DAT structure includes one or more DAT tables, and each DAT entry in each of the one or more DAT tables is associated with an in-use bit indicating whether the DAT entry is in use. Traversing the DAT structure includes pseudo-invalidating each of one or more DAT entries in the DAT structure that are involved in translating the virtual memory address for which the page fault occurred; and identifying a first page frame referenced by the virtual memory address for which the page fault occurred. The data in the first page frame is processed responsive to the page fault.

Abstract: In one embodiment, a computer-implemented method includes producing one or more clean frames by clearing a batch of one or more frames for use in backing virtual memory pages. The producing the one or more clean frames may be performed asynchronously from a unit of work being performed by a processor. The one or more clean frames may be added to a clean frame queue, where the clean frame queue includes a plurality of clean frames that have been cleared. A first request may be received, from the processor, for a frame for use in backing a virtual memory page of the unit of work. A clean frame, of the one or more clean frames, may be removed from the clean frame queue, responsive to the first request. The clean frame may be delivered to the processor, responsive to the first request.

Abstract: Provided herein is a computer-implemented method. The computer-implemented method includes updating, by a processor, a value of a delta field of an entry of a data structure indexed for the processor. The computer-implemented method also includes comparing, by the processor, a predefined threshold for a global field corresponding to the delta field and the value of the delta field. The computer-implemented method also includes rolling, by the processor, the value of the delta field into the global field when an absolute value of the value of the delta field meets or exceeds the predefined threshold for the global field. Note that the data structure is stored in a first area of a memory in communication with the processor that is separate from a second area of the memory storing the global field.

Abstract: Provided herein is a computer-implemented method. The computer-implemented method includes updating, by a processor, a value of a delta field of an entry of a data structure indexed for the processor. The computer-implemented method also includes comparing, by the processor, a predefined threshold for a global field corresponding to the delta field and the value of the delta field. The computer-implemented method also includes rolling, by the processor, the value of the delta field into the global field when an absolute value of the value of the delta field meets or exceeds the predefined threshold for the global field. Note that the data structure is stored in a first area of a memory in communication with the processor that is separate from a second area of the memory storing the global field.

Abstract: A computer-implemented method includes pseudo-invalidating a first Dynamic Address Translation (DAT) table of a DAT structure associated with a workload. A page fault occurring during translation of a virtual memory address of data required by the workload is detected. Responsive to the page fault, the DAT structure is traversed. The DAT structure includes one or more DAT tables, and each DAT entry in each of the one or more DAT tables is associated with an in-use bit indicating whether the DAT entry is in use. Traversing the DAT structure includes pseudo-invalidating each of one or more DAT entries in the DAT structure that are involved in translating the virtual memory address for which the page fault occurred; and identifying a first page frame referenced by the virtual memory address for which the page fault occurred. The data in the first page frame is processed responsive to the page fault.

Abstract: In one embodiment, a computer-implemented method includes producing one or more clean frames by clearing a batch of one or more frames for use in backing virtual memory pages. The producing the one or more clean frames may be performed asynchronously from a unit of work being performed by a processor. The one or more clean frames may be added to a clean frame queue, where the clean frame queue includes a plurality of clean frames that have been cleared. A first request may be received, from the processor, for a frame for use in backing a virtual memory page of the unit of work. A clean frame, of the one or more clean frames, may be removed from the clean frame queue, responsive to the first request. The clean frame may be delivered to the processor, responsive to the first request.