Patents by Inventor Steven M. Pietkiewicz
Steven M. Pietkiewicz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7639517Abstract: System and methodology for controlling output current of switching circuitry having an input circuit and an output circuit electrically isolated from each other. A value of the output current may be determined based on input voltage, input current and reflected output voltage representing the voltage in the input circuit which corresponds to the output voltage. A switching element in the input circuit is controlled to produce the determined value of output current.Type: GrantFiled: February 8, 2007Date of Patent: December 29, 2009Assignee: Linear Technology CorporationInventors: Xigen Zhou, David Roy Ng, Steven M. Pietkiewicz, Robert C. Dobkin
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Patent number: 7528587Abstract: A converter coupled to a DC voltage input and connectable to a load, includes a signal responsive switch coupled between a first circuit point and a second circuit point. In lieu of burst mode operation during low load conditions, the peak switch current is varied directly with load condition and a switch deactivation interval is varied inversely with load condition. The switch deactivation level is within a maximum level to avoid audio frequency band interference, while maintaining high efficiency operation throughout the load range.Type: GrantFiled: December 27, 2005Date of Patent: May 5, 2009Assignee: Linear Technology CorporationInventors: Albert M. Wu, Steven M. Pietkiewicz
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Publication number: 20080192514Abstract: System and methodology for controlling output current of switching circuitry having an input circuit and an output circuit electrically isolated from each other. A value of the output current may be determined based on input voltage, input current and reflected output voltage representing the voltage in the input circuit which corresponds to the output voltage. A switching element in the input circuit is controlled to produce the determined value of output current.Type: ApplicationFiled: February 8, 2007Publication date: August 14, 2008Inventors: Xigen Zhou, David Roy Ng, Steven M. Pietkiewicz, Robert C. Dobkin
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Patent number: 7342365Abstract: A circuit for charging a photoflash that preferably reduces the average input to the switching regulator in an efficient fashion is provided. The regulator includes a transformer. The transformer includes a primary winding and a secondary winding. The switching regulator also includes a switch that closes at the beginning of a first portion of the switching cycle and opens at the end of the first portion of the switching cycle. The second portion of the cycle may be to allow the secondary winding to release current into the load. The switch is adapted to allow the current to build up in the primary winding when the switch is closed. The switching regulator may also include a delay circuit that introduces a delay between the end of the second portion of the cycle and the beginning of the first portion of the next switching cycle.Type: GrantFiled: February 9, 2006Date of Patent: March 11, 2008Assignee: Linear Technology Corp.Inventors: Albert M Wu, Steven M Pietkiewicz
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Patent number: 7292005Abstract: The present invention provides a capacitor charging circuit that efficiently charges capacitive loads. In particular, circuits and techniques are preferably provided for using current from both the primary and secondary windings of a transformer to control ON-time and OFF-time of a switch. This arrangement preferably yields an adaptable ON-time and adaptable OFF-time switch that is capable of rapidly charging capacitor loads ranging from as low as zero volts to several hundred volts. The output voltage is preferably measured indirectly to prevent unnecessary power consumption. In addition, control circuitry can be provided to conserve power by ceasing the delivery of power to the capacitor load once the desired output voltage is reached. Control circuitry preferably operates an interrogation timer that periodically activates the power delivery cycle to maintain the capacitor output load in a constant state of readiness.Type: GrantFiled: February 3, 2006Date of Patent: November 6, 2007Assignee: Linear Technology Corp.Inventors: Steven M Pietkiewicz, Albert M Wu
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Publication number: 20040130299Abstract: The present invention provides a capacitor charging circuit that efficiently charges capacitive loads. In particular, circuits and techniques are preferably provided for using current from both the primary and secondary windings of a transformer to control ON-time and OFF-time of a switch. This arrangement preferably yields an adaptable ON-time and adaptable OFF-time switch that is capable of rapidly charging capacitor loads ranging from as low as zero volts to several hundred volts. The output voltage is preferably measured indirectly to prevent unnecessary power consumption. In addition, control circuitry can be provided to conserve power by ceasing the delivery of power to the capacitor load once the desired output voltage is reached. Control circuitry preferably operates an interrogation timer that periodically activates the power delivery cycle to maintain the capacitor output load in a constant state of readiness.Type: ApplicationFiled: August 19, 2003Publication date: July 8, 2004Applicant: Linear Technology CorporationInventors: Steven M. Pietkiewicz, Albert M. Wu
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Patent number: 6636021Abstract: The present invention provides a capacitor charging circuit that efficiently charges capacitive loads. In particular, circuits and techniques are preferably provided for using current from both the primary and secondary windings of a transformer to control ON-time and OFF-time of a switch. This arrangement preferably yields an adaptable ON-time and adaptable OFF-time switch that is capable of rapidly charging capacitor loads ranging from as low as zero volts to several hundred volts. The output voltage is preferably measured indirectly to prevent unnecessary power consumption. In addition, control circuitry can be provided to conserve power by ceasing the delivery of power to the capacitor load once the desired output voltage is reached. Control circuitry preferably operates an interrogation timer that periodically activates the power delivery cycle to maintain the capacitor output load in a constant state of readiness.Type: GrantFiled: December 18, 2002Date of Patent: October 21, 2003Inventors: Jeffrey Schenkel, Albert M. Wu, Robert C. Dobkin, Steven M. Pietkiewicz
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Publication number: 20030090240Abstract: The present invention provides a capacitor charging circuit that efficiently charges capacitive loads. In particular, circuits and techniques are preferably provided for using current from both the primary and secondary windings of a transformer to control ON-time and OFF-time of a switch. This arrangement preferably yields an adaptable ON-time and adaptable OFF-time switch that is capable of rapidly charging capacitor loads ranging from as low as zero volts to several hundred volts. The output voltage is preferably measured indirectly to prevent unnecessary power consumption. In addition, control circuitry can be provided to conserve power by ceasing the delivery of power to the capacitor load once the desired output voltage is reached. Control circuitry preferably operates an interrogation timer that periodically activates the power delivery cycle to maintain the capacitor output load in a constant state of readiness.Type: ApplicationFiled: December 18, 2002Publication date: May 15, 2003Applicant: Linear Technology CorporationInventors: Jeffrey Schenkel, Albert M. Wu, Robert C. Dobkin, Steven M. Pietkiewicz
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Patent number: 6518733Abstract: The present invention provides a capacitor charging circuit that efficiently charges capacitive loads. In particular, circuits and techniques are preferably provided for using current from both the primary and secondary windings of a transformer to control ON-time and OFF-time of a switch. This arrangement preferably yields an adaptable ON-time and adaptable OFF-time switch that is capable of rapidly charging capacitor loads ranging from as low as zero volts to several hundred volts. The output voltage is preferably measured indirectly to prevent unnecessary power consumption. In addition, control circuitry can be provided to conserve power by ceasing the delivery of power to the capacitor load once the desired output voltage is reached. Control circuitry preferably operates an interrogation timer that periodically activates the power delivery cycle to maintain the capacitor output load in a constant state of readiness.Type: GrantFiled: August 3, 2001Date of Patent: February 11, 2003Assignee: Linear Technology CorporationInventors: Jeffrey Schenkel, Albert M. Wu, Robert C. Dobkin, Steven M. Pietkiewicz
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Patent number: 4633165Abstract: A temperature compensated voltage reference circuit in which a compensation current is generated by establishing a current through a passive impedance element which varies with temperature in accordance with the transistor voltage equation. This current is proportionately reflected into the output impedance circuit associated with the voltage reference, where it compensates for temperature induced voltage variations. The passive impedance element is adjustable to correct for processing variations, and the compensation circuit requires no voltage supplies other than those typically provided for the reference circuit by itself.Type: GrantFiled: August 15, 1984Date of Patent: December 30, 1986Assignee: Precision Monolithics, Inc.Inventors: Steven M. Pietkiewicz, Derek F. Bowers