Patents by Inventor Steven M. Waldstein
Steven M. Waldstein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8825930Abstract: This document discusses, among other things, a system and method for serializing a video signal and providing non-packet-based serialized video information to a physical Universal Serial Bus (USB) interface and, in certain examples, receiving the non-packet-based serialized video information from the physical USB interface, deserializing the received non-packet-based serialized video information, and providing a high definition output signal to a video port (e.g., an HD video port, such as HDMI, DisplayPort, etc.) using the deserialized video information.Type: GrantFiled: November 19, 2012Date of Patent: September 2, 2014Assignee: Patriot Funding, LLCInventors: James A. Siulinski, Steven M. Waldstein
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Patent number: 8750531Abstract: This document discusses, among other things, systems and methods for active noise cancellation. One example system includes a digital ANC circuit configured to receive first audio information from a first microphone and to produce an a digital anti-noise signal configured to attenuate noise sensed by the first microphone; an analog ANC circuit configured to receive second audio information from a second microphone and to produce an analog anti-noise signal configured to attenuate noise sensed by the second microphone; and wherein the system is configured to receive an intended audio signal and to provide an output signal for a speaker using the intended audio signal, the analog anti-noise signal, and the digital anti-noise signal.Type: GrantFiled: October 28, 2010Date of Patent: June 10, 2014Assignee: Fairchild Semiconductor CorporationInventors: Cary L. Delano, Steven M. Waldstein
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Patent number: 8536924Abstract: Apparatus and methods for an integrated circuit, high-impedance network are provided. In an example, the network can include an anti-parallel diode pair coupled between first and second nodes. The anti-parallel diode pair can include a first diode including a P+/NWELL junction and a second diode including N+/PWELL junction. In an example, the first diode and the second diode can include a common substrate.Type: GrantFiled: September 2, 2010Date of Patent: September 17, 2013Assignee: Fairchild Semiconductor CorporationInventors: Andrew M. Jordan, Hrvoje Jasa, Steven M. Waldstein
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Patent number: 8316164Abstract: This document discusses, among other things, a system and method for deserializing non-packet-based video information received using a physical Universal Serial Bus (USB) interface and providing a high definition output signal to a video port (e.g., an HD video port, such as HDMI, DisplayPort, etc.) using the deserialized video information.Type: GrantFiled: June 15, 2010Date of Patent: November 20, 2012Assignee: Patriot Funding, LLCInventors: James A. Siulinski, Steven M. Waldstein
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Patent number: 8255576Abstract: This document discusses, among other things, a system and method for switching serialized video information (e.g., non-packet-based video information) and Universal Serial Bus (USB) information (e.g., packet-based information) to a common output (e.g., to a physical USB interface).Type: GrantFiled: June 15, 2010Date of Patent: August 28, 2012Assignee: Patriot Funding, LLCInventors: James A. Siulinski, Steven M. Waldstein
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Publication number: 20120056668Abstract: Apparatus and methods for an integrated circuit, high-impedance network are provided. In an example, the network can include an anti-parallel diode pair coupled between first and second nodes. The anti-parallel diode pair can include a first diode including a P+/NWELL junction and a second diode including N+/PWELL junction. In an example, the first diode and the second diode can include a common substrate.Type: ApplicationFiled: September 2, 2010Publication date: March 8, 2012Inventors: Andrew M. Jordan, Hrvoje Jasa, Steven M. Waldstein
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Publication number: 20110129098Abstract: This document discusses, among other things, systems and methods for active noise cancellation. One example system includes a digital ANC circuit configured to receive first audio information from a first microphone and to produce an a digital anti-noise signal configured to attenuate noise sensed by the first microphone; an analog ANC circuit configured to receive second audio information from a second microphone and to produce an analog anti-noise signal configured to attenuate noise sensed by the second microphone; and wherein the system is configured to receive an intended audio signal and to provide an output signal for a speaker using the intended audio signal, the analog anti-noise signal, and the digital anti-noise signal.Type: ApplicationFiled: October 28, 2010Publication date: June 2, 2011Inventors: Cary L. Delano, Steven M. Waldstein
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Publication number: 20100318704Abstract: This document discusses, among other things, a system and method for switching serialized video information (e.g., non-packet-based video information) and Universal Serial Bus (USB) information (e.g., packet-based information) to a common output (e.g., to a physical USB interface).Type: ApplicationFiled: June 15, 2010Publication date: December 16, 2010Applicant: Fairchild Semiconductor CorporationInventors: James A. Siulinski, Steven M. Waldstein
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Publication number: 20100318697Abstract: This document discusses, among other things, a system and method for deserializing non-packet-based video information received using a physical Universal Serial Bus (USB) interface and providing a high definition output signal to a video port (e.g., an HD video port, such as HDMI, DisplayPort, etc.) using the deserialized video information.Type: ApplicationFiled: June 15, 2010Publication date: December 16, 2010Applicant: Fairchild Semiconductor CorporationInventors: James A. Siulinski, Steven M. Waldstein
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Patent number: 7355467Abstract: Improvements to the physical layer are provided, for example a test circuit that does not introduce further skew into critical clock signals. A boundary scan test circuit is also provided used to isolate an integrated circuit for applying test vectors or circuit brand connections to test the integrity thereof. A bias voltage generator for a voltage controlled delay line (VCDL) is also provided.Type: GrantFiled: August 14, 2006Date of Patent: April 8, 2008Assignee: Tundra Semiconductor CorporationInventors: Steven M. Waldstein, Maurice Richard, Alexander Alexeyev, David Reynolds
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Patent number: 7112990Abstract: Improvements to the physical layer are provided, for example a test circuit that does not introduce further skew into critical clock signals. A boundary scan test circuit is also provided used to isolate an integrated circuit for applying test vectors or circuit brand connections to test the integrity thereof. A bias voltage generator for a voltage controlled delay line (VCDL) is also provided.Type: GrantFiled: January 16, 2004Date of Patent: September 26, 2006Assignee: Tundra Semiconductor Corp.Inventors: Steven M. Waldstein, Maurice Richard, Alexander Alexeyev, David Reynolds
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Patent number: 5404560Abstract: A central processing unit (CPU) 10 comprises an external control memory for storing microinstructions which correspond to macroinstructions read from a system memory. The microinstructions are 56 bits in length and are read in 28-bit segments. CPU 10 also comprises an internal memory management unit (MMU) 18 which comprises a plurality of address translation entry (ATE) registers four of which are permanent and sixteen of which are temporary in that the storage of a new translation entry occurs in a least recently used temporary translation entry register. CPU 10 also comprises a plurality of status register bits, some of which are settable only by predefined microinstructions. All of the status register bits are branchable. CPU 10 further comprises a condition code register the state of which may be determined by input signal pins. CPU 10 also comprises address generation logic which may generate a 24, 31 or 32 bit address upon a 32-bit address bus.Type: GrantFiled: June 25, 1993Date of Patent: April 4, 1995Assignee: Wang Laboratories, Inc.Inventors: Raymond Y. Lee, Jeffrey M. Bessolo, Vyomesh Shah, Scott D. Vincelette, Steven M. Waldstein, Jeffrey D. Nathan, Steven E. Lang