Abstract: A serializer/deserializer is disclosed with a flexible design that allows for sending data streams between computer systems where the power dissipation is markedly reduced by placing the serializer/deserializer in a standby, low power mode between the sending of data. Word data bits are framed and sent along with clock pulses that define when the bits may be reliably received. High speed, typically, CML logic is used for the transmission line drivers and together with the clock pulse, a data word is sent faster than the computer system can send the next word to the serializer/deserializer. The disclosure frames the word and detects the word end, whereupon the system is placed into the standby mode. In addition the serializer/deserializers may be placed in a master/slave arrangement where the slave can be arranged to use the master's clock to send word data bits back to the master.

Abstract: A serializer/deserializer is disclosed with a flexible design that allows for sending data streams between computer systems where the power dissipation is markedly reduced by placing the serializer/deserializer in a standby, low power mode between the sending of data. Word data bits are framed and sent along with clock pulses that define when the bits may be reliably received. High speed, typically, CTL logic is used for the transmission line drivers and together with the clock pulse, a data word is sent faster than the computer system can send the next word to the serializer/deserializer. The disclosure frames the word and detects the word end, whereupon the system is placed into the standby mode. In addition the serializer/deserializers may be placed in a master/slave arrangement where the slave can be arranged to use the master's clock to send word data bits back to the master.

Abstract: Box switches are stacked sharing a common current from power sources. The power sources may be current, voltage or a combination of such sources. In preferred embodiments, the transistor switches in the box switches may be paralleled by different polarity transistors that will act to better balance and make symmetrical the output signals. Capacitors may be used to smooth out residual noise voltage signals.

Abstract: A differential transmission line driver with supplemental current sources that overcome switching anomalies and EMU issues when the logic state of the driver is switching. During a logic transition, a current source, that is directed to the output of the driver, may be prevented from delivering its current. The present invention provides a supplemental current that is active during this transition period to supply the missing current. The present disclosure also details a common mode circuit that maintains a stable common mode output level to help control EMI issues when the power supply for the driver changes.

Abstract: A differential driver circuit is configured to automatically adjust its source resistance to be substantially similar to a termination resistance. The differential driver circuit includes a variable resistance circuit on each leg of the differential driver circuit. A replica of one leg of the differential driver circuit is configured for adjusting the variable resistance circuits so that the differential driver circuit's source resistance appears to a load as substantially similar to the termination resistance.

Abstract: A low voltage differential swing (LVDS) signal driver having substantially constant output differential voltage (Vod) and substantially constant output offset voltage (Vos) irrespective of variations in circuit fabrication processes, power supply voltages and operating temperatures (PVT), as well as circuit load conditions. A driver replica circuit which replicates a portion of the actual LVDS driver circuit conducts a driver replica operating current that is a scaled replica of the LVDS driver operating current. Operating voltages within the LVDS driver and driver replica circuits are monitored and controlled by bias voltages provided by the driver replica circuit. The desired scaling factor for the operating currents is ensured by appropriate scaling of the sizes of the circuit devices within the LVDS driver and driver replica circuits.

Abstract: An LVDS (Low Voltage Differential Signal) driver circuit having low sensitivity to fabrication process variation, power supply noise voltage variation, and operating temperature variation (PVT). The LVDS driver circuit includes a predriver having an input coupled to an internal circuit. The predriver is coupled to a current source. The current source includes a first resistance and is configured to produce a reference current through the first resistance. The reference current is coupled to the predriver to control an output swing of the predriver, the output swing determined by a ratio of the first resistance and a second resistance in the predriver. The ratio of the first and second resistance is such that the output swing is constant across PVT. An output driver is coupled to the predriver to receive the output swing. The output driver has an output for coupling an output signal to an external circuit.