Patents by Inventor Steven Michael Burchfiel

Steven Michael Burchfiel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5880984
    Abstract: A floating point arithmetic unit for performing independent multiply and add operations in the execution of a multiply-add instruction AC+B on three operands A, B, and C of p-bit precision includes a multiplier unit, a sticky collect unit, an adder unit, and a rounding unit. In addition, a risk condition detection unit provides detection of a risk condition corresponding to an occurrence of an imprecise resultant quantity prior to being rounded by the rounding unit. Upon detection of a risk condition, a trap is triggered and an extended sequence implementation unit carries out an extended multiply-add sequence and provides a multiply-add output having infinite precision prior to a final rounding. A floating point arithmetic method for performing independent multiply and add operations in the execution of a multiply-add instruction AC+B on three operands A, B, and C of p-bit precision is disclosed also.
    Type: Grant
    Filed: January 13, 1997
    Date of Patent: March 9, 1999
    Assignee: International Business Machines Corporation
    Inventors: Steven Michael Burchfiel, Geoffrey Francis Burns, James H. Hesson
  • Patent number: 5668984
    Abstract: A floating point processing system and method of operation are disclosed. Single word precision denormalized operands and also misaligned operands are detected while such operands are being loaded into the first stage of a pipelined floating point unit. Such operands are aligned to a double word boundary and/or single word operands are normalized by a processing stages inserted into the pipe ahead of the first stage of the pipelined floating point unit thereby entering a one stage delay. In this way, misaligned operands and single word denormalized operands can be processed without the need for example to cancel the instruction, execute a normalize or alignment instruction and then re-launch the original instruction.
    Type: Grant
    Filed: February 27, 1995
    Date of Patent: September 16, 1997
    Assignee: International Business Machines Corporation
    Inventors: Michael Preston Taborn, Roger Ned Bailey, Steven Michael Burchfiel
  • Patent number: 5646875
    Abstract: A system and method for denormalizing a floating point result is disclosed. Denormalized operands are capable of representing much smaller values than can be represented by a number normalized under the ANSI/IEEE standard 754-1985 that governs the representation of numbers in floating point notation to ensure uniformity among floating point notation users. The majority of results will be normalized operands and therefore the floating point unit pipeline is optimized to produce normalized results but contains wider exponent fields in order to represent values received as denormalized numbers. In order to return the result as a denormalized number with the smaller ANSI/IEEE exponent field, denormalization is accomplished by using the same pipeline resources by means of the floating point unit feedback path and uses one of the exponent equalizing alignment shifters and an incrementor in order to round the denormalized result.
    Type: Grant
    Filed: February 27, 1995
    Date of Patent: July 8, 1997
    Assignee: International Business Machines Corporation
    Inventors: Michael Preston Taborn, Steven Michael Burchfiel, David Terrence Matheny