Patents by Inventor Steven N. Towle

Steven N. Towle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7589417
    Abstract: A microelectronic assembly is provided, having thermoelectric elements formed on a die so as to pump heat away from the die when current flows through the thermoelectric elements. In one embodiment, the thermoelectric elements are integrated between conductive interconnection elements on an active side of the die. In another embodiment, the thermoelectric elements are on a backside of the die and electrically connected to a carrier substrate on a front side of the die. In a further embodiment, the thermoelectric elements are formed on a secondary substrate and transferred to the die.
    Type: Grant
    Filed: February 12, 2004
    Date of Patent: September 15, 2009
    Assignee: Intel Corporation
    Inventors: Shriram Ramanathan, Gregory M. Chrysler, Steven N. Towle, Anna M. George, legal representative
  • Patent number: 7012015
    Abstract: An embodiment of the present invention is a technique to distribute clock. At least a metal layer is formed to have a standing-wave structure to distribute a clock signal to receiver end points from a clock source such that the receiver end points are substantially electrically equivalent with respect to the clock source. The metal layer is embedded in dielectric layers made of thick film using a wafer-level thick film (WLTF) process.
    Type: Grant
    Filed: July 6, 2005
    Date of Patent: March 14, 2006
    Assignee: Intel Corporation
    Inventors: Henning Braunisch, Anna M. George, legal representative, Steven N. Towle, deceased
  • Patent number: 6975017
    Abstract: In one embodiment there is provided a method comprising performing a sawing operation on a wafer; and treating the wafer to at least reduce a propagation of micro-cracks formed in the wafer during the sawing. In another embodiment there is provided a semi-conductor die comprising a substrate having a central first portion, and a peripheral second portion around the central first portion; an integrated circuit formed on the central first portion; and a guard ring disposed between the first and second portions of the substrate to prevent a propagation of cracks found in that second portion to the first portion, wherein the second portion includes micro-cracks filled with a crack-healing material to arrest propagation of the micro-cracks beyond the guard ring and into the central first portion.
    Type: Grant
    Filed: July 27, 2004
    Date of Patent: December 13, 2005
    Assignee: Intel Corporation
    Inventors: Steven N. Towle, Anna M. George
  • Patent number: 6927496
    Abstract: An embodiment of the present invention is a technique to distribute clock. At least a metal layer is formed to have a standing-wave structure to distribute a clock signal to receiver end points from a clock source such that the receiver end points are substantially electrically equivalent with respect to the clock source. The metal layer is embedded in dielectric layers made of thick film using a wafer-level thick film (WLTF) process.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: August 9, 2005
    Assignee: Intel Corporation
    Inventors: Henning Braunisch, Anna M. George, Steven N. Towle
  • Patent number: 6806168
    Abstract: In one embodiment there is provided a method comprising performing a singulation operation on a wafer; and treating the wafer to at least reduce a propagation of micro-cracks formed in the wafer during the singulation. In another embodiment there is provided a semi-conductor die comprising a substrate having a central first portion, and a peripheral second portion around the central first portion; an integrated circuit formed on the central first portion; and a guard ring disposed between the first and second portions of the substrate to prevent a propagation of micro-cracks formed in the second portion into the first portion, the micro-cracks having been formed during a singulation operation to separate the semiconductor die from a wafer, wherein the second portion includes micro-cracks filled with a crack-healing material to arrest propagation of the micro-cracks beyond the ring and into the central first portion.
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: October 19, 2004
    Assignee: Intel Corporation
    Inventors: Steven N. Towle, Anna M. George
  • Patent number: 6792179
    Abstract: An optical or optoelectroronic component is mounted to a substrate, and an optical thumbtack is inserted into a through-hole of the substrate. The optical thumbtack is positioned to receive light from or send light to the optical or optoelectronic component and provide a conditioned, for example collimated or focused, beam. The optical thumbtack comprises a lens portion, a spacer portion, and a foot portion. Light may enter the thumbtack from either direction.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: September 14, 2004
    Assignee: Intel Corporation
    Inventors: Daoqiang Lu, Gilroy J. Vandentop, Steven N. Towle, Henning Braunisch
  • Patent number: 6770575
    Abstract: A process for forming a thermally stable low-dielectric constant material is provided. A gas mixture is prepared to form a fluorinated amorphous carbon (a-C:F) material. The gas mixture is mixed with a boron-containing gas.
    Type: Grant
    Filed: February 25, 2002
    Date of Patent: August 3, 2004
    Assignee: Intel Corporation
    Inventor: Steven N. Towle
  • Patent number: 6762435
    Abstract: A method of forming a carbon doped oxide layer on a substrate is described. That method comprises introducing into a chemical vapor deposition apparatus a source of carbon, silicon, boron, and oxygen. That apparatus is then operated under conditions that cause a boron containing carbon doped oxide layer to form on the substrate.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: July 13, 2004
    Assignee: Intel Corporation
    Inventor: Steven N. Towle
  • Publication number: 20040126064
    Abstract: One or more optical or optoelectronic components are mounted to one or more substrates/boards, and an optical assembly is inserted into one or more through-holes in the one or more substrates/boards. The optical assembly is positioned to receive light from or send light to the optical or optoelectronic components and provide a conditioned, for example collimated or focused, beam. The optical assembly comprises at least one lens portion, spacer portion, coupler portion, and a waveguide.
    Type: Application
    Filed: December 31, 2002
    Publication date: July 1, 2004
    Inventors: Gilroy J. Vandentop, Henning Braunisch, Steven N. Towle, Daoqiang Lu
  • Publication number: 20040126058
    Abstract: An optical or optoelectronic component is mounted to a substrate, and an optical thumbtack is inserted into a through-hole of the substrate. The optical thumbtack is positioned to receive light from or send light to the optical or optoelectronic component and provide a conditioned, for example collimated or focused, beam. The optical thumbtack comprises a lens portion, a spacer portion, and a foot portion. Light may enter the thumbtack from either direction.
    Type: Application
    Filed: December 31, 2002
    Publication date: July 1, 2004
    Inventors: Daoqiang Lu, Gilroy J. Vandentop, Steven N. Towle, Henning Braunisch
  • Publication number: 20040099877
    Abstract: In one embodiment there is provided a method comprising performing a sawing operation on a wafer; and treating the wafer to at least reduce a propagation of micro-cracks formed in the wafer during the sawing. In another embodiment there is provided a semi-conductor die comprising a substrate having a central first portion, and a peripheral second portion around the central first portion; an integrated circuit formed on the central first portion; and a guard ring disposed between the first and second portions of the substrate to prevent a propagation of cracks found in that second portion to the first portion, wherein the second portion includes micro-cracks filled with a crack-healing material to arrest propagation of the micro-cracks beyond the guard ring and into the central first portion.
    Type: Application
    Filed: November 27, 2002
    Publication date: May 27, 2004
    Inventors: Steven N. Towle, Anna M. George
  • Publication number: 20030211325
    Abstract: A method of forming a carbon doped oxide layer on a substrate is described. That method comprises introducing into a chemical vapor deposition apparatus a source of carbon, silicon, boron, and oxygen. That apparatus is then operated under conditions that cause a boron containing carbon doped oxide layer to form on the substrate.
    Type: Application
    Filed: June 9, 2003
    Publication date: November 13, 2003
    Inventor: Steven N. Towle
  • Patent number: 6610362
    Abstract: A method of forming a carbon doped oxide layer on a substrate is described. That method comprises introducing into a chemical vapor deposition apparatus a source of carbon, silicon, boron, and oxygen. That apparatus is then operated under conditions that cause a boron containing carbon doped oxide layer to form on the substrate.
    Type: Grant
    Filed: November 20, 2000
    Date of Patent: August 26, 2003
    Assignee: Intel Corporation
    Inventor: Steven N. Towle
  • Patent number: 6518171
    Abstract: Dual-Damascene processes for difficult to etch low k dielectric such as carbon-doped oxide. First deposition of dielectric is made to thickness of vias only, then etched. Second depositions of dielectric is made to thickness of conductor and then etched.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: February 11, 2003
    Assignee: Intel Corporation
    Inventor: Steven N. Towle
  • Patent number: 6436822
    Abstract: A method of forming a carbon doped oxide dielectric material on a substrate is described. That method comprises introducing into a chemical vapor deposition apparatus an alkyl oxysilane precursor. That apparatus is then operated under conditions that cause a carbon doped oxide to form on the substrate, while maintaining the substrate temperature at less than about 200° C.
    Type: Grant
    Filed: November 20, 2000
    Date of Patent: August 20, 2002
    Assignee: Intel Corporation
    Inventor: Steven N. Towle
  • Publication number: 20020088707
    Abstract: A process for forming a thermally stable low-dielectric constant material is provided. A gas mixture is prepared to form a fluorinated amorphous carbon (a-C:F) material. The gas mixture is mixed with a boron-containing gas.
    Type: Application
    Filed: February 25, 2002
    Publication date: July 11, 2002
    Inventor: Steven N. Towle
  • Publication number: 20010048095
    Abstract: A process for forming a thermally stable low-dielectric constant material is provided. A gas mixture is prepared to form a fluorinated amorphous carbon (a-C:F) material. The gas mixture is mixed with a boron-containing gas.
    Type: Application
    Filed: July 1, 1998
    Publication date: December 6, 2001
    Inventor: STEVEN N. TOWLE