Patents by Inventor Steven Orodon Hobbs

Steven Orodon Hobbs has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7107583
    Abstract: A method for compiling a program to reduce the possibility of cache thrashing is provided. The method comprises identifying a loop in a program, identifying each vector memory reference in the loop, and determining dependencies between the vector memory references in the loop. Determining the dependencies includes determining unidirectional and circular dependencies. Thereafter, the vector memory references are distributed into a plurality of detail loops, wherein the vector memory references that have circular dependencies therebetween are included in a common detail loop, and the detail loops are ordered according to the unidirectional dependencies between the memory references.
    Type: Grant
    Filed: February 16, 2001
    Date of Patent: September 12, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Steven Orodon Hobbs, Erin Elizabeth Chapyak
  • Patent number: 6675374
    Abstract: A technique is provided for inserting memory prefetch instructions only at appropriate locations in program code. The instructions are inserted into the program code such that, when the code is executed, the speed and efficiency of execution of the code may be improved, cache conflicts arising from execution of the prefetch instruction may be substantially eliminated, and the number of simultaneously-executing memory prefetch operations may be limited to prevent stalling and/or overtaxing of the processor executing the code.
    Type: Grant
    Filed: October 12, 1999
    Date of Patent: January 6, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: John Samuel Pieper, Steven Orodon Hobbs, Stephen Corridon Root
  • Publication number: 20030005419
    Abstract: A technique is provided for inserting memory prefetch instructions only at appropriate locations in program code. The instructions are inserted into the program code such that, when the code is executed, the speed and efficiency of execution of the code may be improved, cache conflicts arising from execution of the prefetch instruction may be substantially eliminated, and the number of simultaneously-executing memory prefetch operations may be limited to prevent stalling and/or overtaxing of the processor executing the code.
    Type: Application
    Filed: October 12, 1999
    Publication date: January 2, 2003
    Inventors: JOHN SAMUEL PIEPER, STEVEN ORODON HOBBS, STEPHEN CORRIDON ROOT
  • Publication number: 20020199178
    Abstract: A method for compiling a program to reduce the possibility of cache thrashing is provided. The method comprises identifying a loop in a program, identifying each vector memory reference in the loop, and determining dependencies between the vector memory references in the loop. Determining the dependencies includes determining unidirectional and circular dependencies. Thereafter, the vector memory references are distributed into a plurality of detail loops, wherein the vector memory references that have circular dependencies therebetween are included in a common detail loop, and the detail loops are ordered according to the unidirectional dependencies between the memory references.
    Type: Application
    Filed: February 16, 2001
    Publication date: December 26, 2002
    Inventors: Steven Orodon Hobbs, Erin Elizabeth Chapyak