Abstract: A circuit for charging a photoflash that preferably reduces the average input to the switching regulator in an efficient fashion is provided. The regulator includes a transformer. The transformer includes a primary winding and a secondary winding. The switching regulator also includes a switch that closes at the beginning of a first portion of the switching cycle and opens at the end of the first portion of the switching cycle. The second portion of the cycle may be to allow the secondary winding to release current into the load. The switch is adapted to allow the current to build up in the primary winding when the switch is closed. The switching regulator may also include a delay circuit that introduces a delay between the end of the second portion of the cycle and the beginning of the first portion of the next switching cycle.

Abstract: A converter coupled to a DC voltage input and connectable to a load, includes a signal responsive switch coupled between a first circuit point and a second circuit point. In lieu of burst mode operation during low load conditions, the peak switch current is varied directly with load condition and a switch deactivation interval is varied inversely with load condition. The switch deactivation level is within a maximum level to avoid audio frequency band interference, while maintaining high efficiency operation throughout the load range.

Abstract: The present invention provides a capacitor charging circuit that efficiently charges capacitive loads. In particular, circuits and techniques are preferably provided for using current from both the primary and secondary windings of a transformer to control ON-time and OFF-time of a switch. This arrangement preferably yields an adaptable ON-time and adaptable OFF-time switch that is capable of rapidly charging capacitor loads ranging from as low as zero volts to several hundred volts. The output voltage is preferably measured indirectly to prevent unnecessary power consumption. In addition, control circuitry can be provided to conserve power by ceasing the delivery of power to the capacitor load once the desired output voltage is reached. Control circuitry preferably operates an interrogation timer that periodically activates the power delivery cycle to maintain the capacitor output load in a constant state of readiness.