Patents by Inventor Steven R. Eskildsen

Steven R. Eskildsen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160172336
    Abstract: Apparatus and methods are disclosed to allow independent control of stacked memory modules. In one embodiment, an apparatus may comprise first, second, and third modules, each of the first, second and third modules having a plurality of stacked memory dice, at least some of the plurality of stacked memory dice including a Chip Enable (CE) signal electrically accessible from a bottom surface of a corresponding module of the first, second and third modules. The apparatus may comprise a Package-on-Package (PoP) structure where the first, second and third modules are attached to one another such that an individual access to each CE signal associated with the PoP structure is provided from the bottom surface of the corresponding module.
    Type: Application
    Filed: February 22, 2016
    Publication date: June 16, 2016
    Inventors: Robert N. Schenck, Steven R. Eskildsen
  • Patent number: 9269403
    Abstract: Various embodiments of apparatuses are disclosed to allow independent control of stacked modules. In one embodiment, an apparatus may include a plurality of stacked memory dice, with at least some of the plurality of stacked memory dice include a Chip Enable (CE) signal connection electrically accessible from a surface of a corresponding one of the dice. Each of the stacked dice having the CE signal connection is controllable individually by a unique CE signal applied to the CE signal connection. Other apparatuses are disclosed.
    Type: Grant
    Filed: February 6, 2015
    Date of Patent: February 23, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Robert N Schenck, Steven R. Eskildsen
  • Publication number: 20150155011
    Abstract: Various embodiments of apparatuses are disclosed to allow independent control of stacked modules. In one embodiment, an apparatus may include a plurality of stacked memory dice, with at least some of the plurality of stacked memory dice include a Chip Enable (CE) signal connection electrically accessible from a surface of a corresponding one of the dice. Each of the stacked dice having the CE signal connection is controllable individually by a unique CE signal applied to the CE signal connection. Other apparatuses are disclosed.
    Type: Application
    Filed: February 6, 2015
    Publication date: June 4, 2015
    Inventors: Robert N. Schenck, Steven R. Eskildsen
  • Publication number: 20110012670
    Abstract: A device with an in package power supply may be utilized to supply power to other components. As a result, the overall system size may be reduced and economies may be achieved.
    Type: Application
    Filed: September 23, 2010
    Publication date: January 20, 2011
    Inventors: Steven R. Eskildsen, Duane R. Mills
  • Patent number: 7823279
    Abstract: A packaged device may be provided with an in package power supply. The in package power supply may be selectively coupled to another component when the packaged device is not active.
    Type: Grant
    Filed: April 1, 2002
    Date of Patent: November 2, 2010
    Assignee: Intel Corporation
    Inventors: Steven R. Eskildsen, Duane R. Mills
  • Patent number: 7533457
    Abstract: A method includes populating a circuit board with components, and encapsulating the circuit board and the components with a material. The method further includes separating the circuit board into a plurality of separate devices.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: May 19, 2009
    Assignee: Intel Corporation
    Inventors: Richard B Foehringer, Jason E Snodgress, Steven R. Eskildsen, John G. Meyers
  • Patent number: 6704204
    Abstract: An apparatus and method for allowing the lead pins of an integrated circuit (IC) package to provide the electrical interface between the IC package and a receptacle of the host data processing system is described. The present invention comprises an IC package housed within a card casing to form an IC card, with the leads from the IC package providing the electrical interface between the IC card and the data processing system into which the IC card is inserted. Thus, the present invention eliminates the need for a printed circuit board (PCB) and connector to provide the interconnection between the IC package and the data processing system.
    Type: Grant
    Filed: June 23, 1998
    Date of Patent: March 9, 2004
    Assignee: Intel Corporation
    Inventors: Steven R. Eskildsen, Jeffrey C. Franz, David S. Brannam
  • Patent number: 6655022
    Abstract: A method of implementing a micro BGA is introduced. More specifically, the method discloses packaging an integrated circuit into an integrated circuit assembly. The method first mounts polyimide tape to a lead frame. The polyimide tape serves as a substrate for the integrated circuit package. Next, a piece of elastomer is coupled to said polyimide tape. Then an integrated circuit die is attached to said elastomer. Lead beams are then bonded from bond pads on said die to said lead frame. Solder balls are attached to said lead frame. The attached solder balls may be located beyond the area of said die.
    Type: Grant
    Filed: September 24, 1998
    Date of Patent: December 2, 2003
    Assignee: Intel Corporation
    Inventors: Steven R. Eskildsen, Richard B. Foehringer, Deborah S. Kaller
  • Publication number: 20030184963
    Abstract: A device with an in package power supply may be utilized to supply power to other components. As a result, the overall system size may be reduced and economies may be achieved.
    Type: Application
    Filed: April 1, 2002
    Publication date: October 2, 2003
    Inventors: Steven R. Eskildsen, Duane R. Mills
  • Patent number: 6605875
    Abstract: Integrated circuit die having bond pads near adjacent sides to allow stacking of dice without regard to dice size. A lower die has keep out areas on its top surface. The keep out areas correspond to two adjacent edges of the lower die. The lower die has bond pads within the keep out areas. An upper die is stacked on the top surface of the lower die such that the bond pads within the keep out areas of the lower die are exposed to accept wire bonds. The configuration of the keep out areas next to adjacent edges of the lower die thus provides flexibility in the design of stacked chip packages because the size of the upper die is not limited by the bond pad configuration of the lower die.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: August 12, 2003
    Assignee: Intel Corporation
    Inventor: Steven R. Eskildsen
  • Publication number: 20030102567
    Abstract: Integrated circuit die having bond pads near adjacent sides to allow stacking of dice without regard to dice size. A lower die has keep out areas on its top surface. The keep out areas correspond to two adjacent edges of the lower die. The lower die has bond pads within the keep out areas. An upper die is stacked on the top surface of the lower die such that the bond pads within the keep out areas of the lower die are exposed to accept wire bonds. The configuration of the keep out areas next to adjacent edges of the lower die thus provides flexibility in the design of stacked chip packages because the size of the upper die is not limited by the bond pad configuration of the lower die.
    Type: Application
    Filed: December 30, 1999
    Publication date: June 5, 2003
    Inventor: STEVEN R. ESKILDSEN
  • Patent number: 6547570
    Abstract: An apparatus and method allowing the leads of an integrated circuit (IC) package to provide the electrical interface between an IC die housed within the IC package and a card connector of an IC card that is to be inserted into a host data processing system. The present invention comprises an IC package housed within a card casing to form an IC card, with the leads from the IC package providing the electrical interface between the IC card connector and the IC package. The IC card connector then provides the electrical interface between the IC card and the data processing system. The present invention eliminates a need for both a printed circuit board (PCB) and the soldering step of coupling the IC package to the PCB.
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: April 15, 2003
    Assignee: Intel Corporation
    Inventors: Steven R. Eskildsen, Jeffrey C. Franz, David S. Brannam
  • Patent number: 6489557
    Abstract: The present invention introduces a method of implementing micro BGA. More specifically, the present invention discloses a method of packaging an integrated circuit into an integrated circuit assembly. The method of the present invention first mounts polyimide tape to a lead frame. The polyimide tape serves as a substrate for the integrated circuit package. Next, a piece of elastomer is coupled to said polyimide tape. Then an integrated circuit die is attached to said elastomer. Lead beams are then bonded from bond pads on said die to said lead frame. Solder balls are attached to said lead frame. The attached solder balls may be located beyond the area of said die.
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: December 3, 2002
    Assignee: Intel Corporation
    Inventors: Steven R. Eskildsen, Richard B. Foehringer, Deborah S. Kaller
  • Publication number: 20020079120
    Abstract: The present invention introduces a method of implementing micro BGA. More specifically, the present invention discloses a method of packaging an integrated circuit into an integrated circuit assembly. The method of the present invention first mounts polyimide tape to a lead frame. The polyimide tape serves as a substrate for the integrated circuit package. Next, a piece of elastomer is coupled to said polyimide tape. Then an integrated circuit die is attached to said elastomer. Lead beams are then bonded from bond pads on said die to said lead frame. Solder balls are attached to said lead frame. The attached solder balls may be located beyond the area of said die.
    Type: Application
    Filed: August 30, 1999
    Publication date: June 27, 2002
    Inventors: STEVEN R. ESKILDSEN, RICHARD B. FOEHRINGER, DEBORAH S. KALLER
  • Patent number: 6356456
    Abstract: A method and apparatus for retaining an electronic function card in the receptacle of a host data processing system (host socket) is described. The present invention exerts a retention force on the card in addition to the frictional forces exerted on each of the connector contacts inserted into the host socket. By increasing the retention forces exerted on an electronic function inserted into a host socket, the chance of the card dislodging from the host socket during a mechanical shock event is reduced. The present invention also provides tactile and/or auditory feedback to the user to indicate when the card is fully inserted into the host socket. Further, a card extractor may be coupled to the retainer of the present invention. When disengaged, the card extractor will release the retention force on the card and the card may be easily removed from the host socket.
    Type: Grant
    Filed: June 23, 1998
    Date of Patent: March 12, 2002
    Assignee: Intel Corporation
    Inventor: Steven R. Eskildsen
  • Publication number: 20010027034
    Abstract: An apparatus and method allowing the leads of an integrated circuit (IC) package to provide the electrical interface between an IC die housed within the IC package and a card connector of an IC card that is to be inserted into a host data processing system. The present invention comprises an IC package housed within a card casing to form an IC card, with the leads from the IC package providing the electrical interface between the IC card connector and the IC package. The IC card connector then provides the electrical interface between the IC card and the data processing system. The present invention eliminates a need for both a printed circuit board (PCB) and the soldering step of coupling the IC package to the PCB.
    Type: Application
    Filed: February 23, 2001
    Publication date: October 4, 2001
    Inventors: Steven R. Eskildsen, Jeffrey C. Franz, David S. Brannam
  • Patent number: 6250934
    Abstract: An apparatus and method allowing the leads of an integrated circuit (IC) package to provide the electrical interface between an IC die housed within the IC package and a card connector of an IC card that is to be inserted into a host data processing system. The present invention comprises an IC package housed within a card casing to form an IC card, with the leads from the IC package providing the electrical interface between the IC card connector and the IC package. The IC card connector then provides the electrical interface between the IC card and the data processing system. The present invention eliminates a need for both a printed circuit board (PCB) and the soldering step of coupling the IC package to the PCB.
    Type: Grant
    Filed: June 23, 1998
    Date of Patent: June 26, 2001
    Assignee: Intel Corporation
    Inventors: Steven R. Eskildsen, Jeffrey C. Franz, David S. Brannam
  • Publication number: 20010002876
    Abstract: A method and apparatus for retaining an electronic function card in the receptacle of a host data processing system (host socket) is described. The present invention exerts a retention force on the card in addition to the frictional forces exerted on each of the connector contacts inserted into the host socket. By increasing the retention forces exerted on an electronic function inserted into a host socket, the chance of the card dislodging from the host socket during a mechanical shock event is reduced. The present invention also provides tactile and/or auditory feedback to the user to indicate when the card is fully inserted into the host socket. Further, a card extractor may be coupled to the retainer of the present invention. When disengaged, the card extractor will release the retention force on the card and the card may be easily removed from the host socket.
    Type: Application
    Filed: June 23, 1998
    Publication date: June 7, 2001
    Inventor: STEVEN R. ESKILDSEN
  • Patent number: 5336456
    Abstract: A method of producing surface features having topological variances in the scribeline areas of a wafer adjacent to the dies. Surface features are used to reduce fracturing of molding compound and to prevent movement of the molding compound with respect to the surface of a die in a plastic encapsulated integrated circuit.
    Type: Grant
    Filed: December 15, 1992
    Date of Patent: August 9, 1994
    Assignee: Intel Corporation
    Inventors: Steven R. Eskildsen, Suresh V. Golwalkar, Tito Barrios