Abstract: An Internet service provider uses virtual machines dedicated to one (or a few) customers to perform transactions on behalf of those customers, where the transactions require sensitive or confidential user authentication data. Each virtual machine only has access to the user authentication data it needs to perform the transactions for its dedicated customers, not authentication data for all the customers of the service provider. Virtual machines are shut clown when not performing transactions or interacting with customers, thus further reducing the risk of disclosure of the confidential user authentication data.

Abstract: An Internet service provider uses virtual machines dedicated to one (or a few) customers to perform transactions on behalf of those customers, where the transactions require sensitive or confidential user authentication data. Each virtual machine only has access to the user authentication data it needs to perform the transactions for its dedicated customers, not authentication data for all the customers of the service provider. Virtual machines are shut clown when not performing transactions or interacting with customers, thus further reducing the risk of disclosure of the confidential user authentication data.

Abstract: A design for test focused tester has a single printed circuit board tester architecture. By focusing on design for test testing and eliminating functional testing, the design for test focused tester reduces or eliminates requirements for high speed, precision signal formatting and timing circuitry that require a multiple board architecture interconnected via a high speed backplane. The single board architecture places a vector sequencer and vector memory close to the device under test, which provides short, consistent signal paths to the device and eliminates the need for dead cycles and synchronization between tester boards.

Abstract: A scan test viewing and analysis tool for an integrated circuit tester provides inter-related views of scan tests on an integrated circuit device. The tool processes a test program specification, execution results and device definition to produce cross-referencing data, which the tool then uses to provide navigation links between correlated locations in a cyclized test view, procedural test program view, and views of signal vectors, scan state and scan vectors. The tool also provides a capability to edit the test program in the views.

Abstract: A scan test viewing and analysis tool for an integrated circuit tester provides inter-related views of scan tests on an integrated circuit device. The tool processes a test program specification, execution results and device definition to produce cross-referencing data, which the tool then uses to provide navigation links between correlated locations in a cyclized test view, procedural test program view, and views of signal vectors, scan state and scan vectors. The tool also provides a capability to edit the test program in the views.

Abstract: A DFT-focused tester has a single printed circuit board tester architecture. By focusing on DFT testing and eliminating functional testing, the DFT-focused tester reduces or eliminates requirements for high speed, precision signal formatting and timing circuitry that require a multiple board architecture interconnected via a high speed backplane. The single board architecture places a vector sequencer and vector memory close to the device under test, which provides short, consistent signal paths to the device and eliminates the need for dead cycles and synchronization between tester boards.