Patents by Inventor Steven R. Rivet

Steven R. Rivet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10582617
    Abstract: A circuit module includes a plurality of electronic components and a single-layer conductive package substrate. The single-layer conductive package substrate is adapted to physically support and electrically interconnect the electronic components. The substrate has a peripheral portion and an interior portion. The peripheral portion includes a plurality of peripheral contact pads coupled to corresponding electronic components. The interior portion includes a plurality of floating contact pads that are electrically isolated from the peripheral contact pads and are coupled to corresponding electronic components.
    Type: Grant
    Filed: July 21, 2017
    Date of Patent: March 3, 2020
    Assignee: Intersil Americas LLC
    Inventors: Jian Yin, Nikhil Kelkar, Loyde M. Carpenter, Jr., Nattorn Pongratananukul, Patrick J. Selby, Steven R. Rivet, Michael W. Althar
  • Publication number: 20190267365
    Abstract: Embodiments disclosed herein provide for a circuit including first die having an active side and a backside, wherein the first die is flip-chip mounted to a carrier. The circuit also includes a second die stacked on the backside of the first die, wherein the second die is stacked on the first die such that a backside of the second die is facing the backside of the first die and an active side of the second die faces away from the first die.
    Type: Application
    Filed: May 13, 2019
    Publication date: August 29, 2019
    Inventors: Francois HEBERT, Steven R. RIVET, Michael ALTHAR, Peter OAKLANDER
  • Patent number: 10290618
    Abstract: Embodiments disclosed herein provide for a circuit including first die having an active side and a backside, wherein the first die is flip-chip mounted to a carrier. The circuit also includes a second die stacked on the backside of the first die, wherein the second die is stacked on the first die such that a backside of the second die is facing the backside of the first die and an active side of the second die faces away from the first die.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: May 14, 2019
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Francois Hebert, Steven R. Rivet, Michael Althar, Peter Oaklander
  • Publication number: 20170325333
    Abstract: A circuit module includes a plurality of electronic components and a single-layer conductive package substrate. The single-layer conductive package substrate is adapted to physically support and electrically interconnect the electronic components. The substrate has a peripheral portion and an interior portion. The peripheral portion includes a plurality of peripheral contact pads coupled to corresponding electronic components. The interior portion includes a plurality of floating contact pads that are electrically isolated from the peripheral contact pads and are coupled to corresponding electronic components.
    Type: Application
    Filed: July 21, 2017
    Publication date: November 9, 2017
    Applicant: Intersil Americas LLC
    Inventors: Jian YIN, Nikhil KELKAR, Loyde M. CARPENTER,, JR., Nattorn PONGRATANANUKUL, Patrick J. SELBY, Steven R. RIVET, Michael W. ALTHAR
  • Patent number: 9717146
    Abstract: A circuit module includes a plurality of electronic components and a single-layer conductive package substrate. The single-layer conductive package substrate is adapted to physically support and electrically interconnect the electronic components. The substrate has a peripheral portion and an interior portion. The peripheral portion includes a plurality of peripheral contact pads coupled to corresponding electronic components. The interior portion includes a plurality of floating contact pads that are electrically isolated from the peripheral contact pads and are coupled to corresponding electronic components.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: July 25, 2017
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Jian Yin, Nikhil Kelkar, Loyde M. Carpenter, Jr., Nattorn Pongratananukul, Patrick J. Selby, Steven R. Rivet, Michael W. Althar
  • Publication number: 20170053904
    Abstract: Embodiments disclosed herein provide for a circuit including first die having an active side and a backside, wherein the first die is flip-chip mounted to a carrier. The circuit also includes a second die stacked on the backside of the first die, wherein the second die is stacked on the first die such that a backside of the second die is facing the backside of the first die and an active side of the second die faces away from the first die.
    Type: Application
    Filed: November 7, 2016
    Publication date: February 23, 2017
    Inventors: Francois Hebert, Steven R. Rivet, Michael Althar, Peter Oaklander
  • Patent number: 9524957
    Abstract: Embodiments disclosed herein provide for a circuit including first die having an active side and a backside, wherein the first die is flip-chip mounted to a carrier. The circuit also includes a second die stacked on the backside of the first die, wherein the second die is stacked on the first die such that a backside of the second die is facing the backside of the first die and an active side of the second die faces away from the first die.
    Type: Grant
    Filed: January 26, 2012
    Date of Patent: December 20, 2016
    Assignee: Intersil Americas LLC
    Inventors: Francois Hebert, Steven R. Rivet, Michael Althar, Peter Oaklander
  • Publication number: 20130314879
    Abstract: A circuit module includes a plurality of electronic components and a single-layer conductive package substrate. The single-layer conductive package substrate is adapted to physically support and electrically interconnect the electronic components. The substrate has a peripheral portion and an interior portion. The peripheral portion includes a plurality of peripheral contact pads coupled to corresponding electronic components. The interior portion includes a plurality of floating contact pads that are electrically isolated from the peripheral contact pads and are coupled to corresponding electronic components.
    Type: Application
    Filed: June 28, 2012
    Publication date: November 28, 2013
    Applicant: INTERSIL AMERICAS LLC
    Inventors: Jian YIN, Nikhil KELKAR, Loyde M. CARPENTER, JR., Nattorn PONGRATANANUKUL, Patrick J. SELBY, Steven R. RIVET, Michael W. ALTHAR
  • Publication number: 20130043940
    Abstract: Embodiments disclosed herein provide for a circuit including first die having an active side and a backside, wherein the first die is flip-chip mounted to a carrier. The circuit also includes a second die stacked on the backside of the first die, wherein the second die is stacked on the first die such that a backside of the second die is facing the backside of the first die and an active side of the second die faces away from the first die.
    Type: Application
    Filed: January 26, 2012
    Publication date: February 21, 2013
    Applicant: INTERSIL AMERICAS LLC
    Inventors: Francois Hebert, Steven R. Rivet, Michael Althar, Peter Oaklander