Patents by Inventor Steven R. Testa

Steven R. Testa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Blade server assembly
    Patent number: 7940521
    Abstract: A blade server assembly is disclosed that includes a blade server chassis, a blade server, and a support assembly connected with the blade server chassis and with the blade server so as to support the blade server substantially outside the blade server chassis. A method is also disclosed for maintaining a blade server installed in a blade server chassis that includes supporting the blade server substantially outside the blade server chassis through a support assembly connected with the blade server chassis and with the blade server.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: May 10, 2011
    Assignee: International Business Machines Corporation
    Inventors: James L. Carlisi, Keith D. Richeson, Steven R. Testa, John K. Whetzel
  • Apparatus and method for decreasing the latency between instruction cache and a pipeline processor
    Patent number: 7711930
    Abstract: A method and apparatus for executing instructions in a pipeline processor. The method decreases the latency between an instruction cache and a pipeline processor when bubbles occur in the processing stream due to an execution of a branch correction, or when an interrupt changes the sequence of an instruction stream. The latency is reduced when a decode stage for detecting branch prediction and a related instruction queue location have invalid data representing a bubble in the processing stream. Instructions for execution are inserted in parallel into the decode stage and instruction queue, thereby reducing by one cycle time the length of the pipeline stage.
    Type: Grant
    Filed: October 8, 2007
    Date of Patent: May 4, 2010
    Assignee: International Business Machines Corporation
    Inventors: James N. Dieffenderfer, Richard W. Doing, Brian M. Stempel, Steven R. Testa, Kenichi Tsuchiya
  • Blade Server Assembly
    Publication number: 20080266813
    Abstract: A blade server assembly is disclosed that includes a blade server chassis, a blade server, and a support assembly connected with the blade server chassis and with the blade server so as to support the blade server substantially outside the blade server chassis. A method is also disclosed for maintaining a blade server installed in a blade server chassis that includes supporting the blade server substantially outside the blade server chassis through a support assembly connected with the blade server chassis and with the blade server.
    Type: Application
    Filed: June 27, 2008
    Publication date: October 30, 2008
    Applicant: International Business Machines Corporation
    Inventors: James L. Carlisi, Keith D. Richeson, Steven R. Testa, John K. Whetzel
  • Blade server assembly
    Patent number: 7423870
    Abstract: A blade server assembly is disclosed that includes a blade server chassis, a blade server, and a support assembly connected with the blade server chassis and with the blade server so as to support the blade server substantially outside the blade server chassis. A method is also disclosed for maintaining a blade server installed in a blade server chassis that includes supporting the blade server substantially outside the blade server chassis through a support assembly connected with the blade server chassis and with the blade server.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: September 9, 2008
    Assignee: International Business Machines Corporation
    Inventors: James L. Carlisi, Keith D. Richeson, Steven R. Testa, John K. Whetzel
  • APPARATUS AND METHOD FOR DECREASING THE LATENCY BETWEEN INSTRUCTION CACHE AND A PIPELINE PROCESSOR
    Publication number: 20080177981
    Abstract: A method and apparatus for executing instructions in a pipeline processor. The method decreases the latency between an instruction cache and a pipeline processor when bubbles occur in the processing stream due to an execution of a branch correction, or when an interrupt changes the sequence of an instruction stream. The latency is reduced when a decode stage for detecting branch prediction and a related instruction queue location have invalid data representing a bubble in the processing stream. Instructions for execution are inserted in parallel into the decode stage and instruction queue, thereby reducing by one cycle time the length of the pipeline stage.
    Type: Application
    Filed: October 8, 2007
    Publication date: July 24, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James N. Dieffenderfer, Richard W. Doing, Brian M. Stempel, Steven R. Testa, Kenichi Tsuchiya
  • Apparatus and method for decreasing the latency between an instruction cache and a pipeline processor
    Patent number: 7281120
    Abstract: A method and apparatus for executing instructions in a pipeline processor. The method decreases the latency between an instruction cache and a pipeline processor when bubbles occur in the processing stream due to an execution of a branch correction, or when an interrupt changes the sequence of an instruction stream. The latency is reduced when a decode stage for detecting branch prediction and a related instruction queue location have invalid data representing a bubble in the processing stream. Instructions for execution are inserted in parallel into the decode stage and instruction queue, thereby reducing by one cycle time the length of the pipeline stage.
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: October 9, 2007
    Assignee: International Business Machines Corporation
    Inventors: James N. Dieffenderfer, Richard W. Doing, Brian M. Stempel, Steven R. Testa, Kenichi Tsuchiya