Patents by Inventor Steven R. Vasquez
Steven R. Vasquez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9842617Abstract: An apparatus includes: a media; a heat assisted magnetic recording (HAMR) head over the media; and control circuitry, coupled to the HAMR head, the control circuitry being configured to: receive a write command to write the media; apply a dynamic flying height (DFH) control before asserting a write gate of the HAMR head; assert the write gate to the HAMR head; and enable a flying height compensation mechanism to maintain a constant value of a flying height of the HAMR head over the media during a next assertion of the write gate.Type: GrantFiled: June 29, 2015Date of Patent: December 12, 2017Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Phillip Scott Haralson, Galvin T. P. Chia, Steven R. Vasquez, Mark McDaniel
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Patent number: 9836232Abstract: A data storage device is disclosed comprising a volatile memory, a primary and a first secondary non-volatile memory (NVM), and control circuitry coupled to the volatile memory and the primary and first secondary NVM and configured to (a) write metadata and user data associated with a host write command to the volatile memory; (b) write the user data to the primary NVM; (c) continue to write metadata associated with each of one or more host write commands to the volatile memory, and when a first condition is met, write metadata that has accumulated in the volatile memory to the first secondary NVM; and (d) repeat (c), and when a second condition is met, then write at least a portion of the metadata that has accumulated in the first secondary NVM or the volatile memory to the primary NVM.Type: GrantFiled: September 30, 2015Date of Patent: December 5, 2017Assignee: Western Digital Technologies, Inc.Inventors: Steven R. Vasquez, James N. Malina
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Patent number: 9082419Abstract: A disk drive is disclosed comprising a head actuated over a disk having a plurality of tracks, wherein each track comprises a plurality of data sectors and a plurality of servo sectors. The disk drive further comprises control circuitry including a read channel. The control circuitry configures a power mode of the read channel into a no-op mode, and when the head approaches a servo sector, configures the power mode into a servo mode. After configuring the power mode into the servo mode, the control circuitry waits for a pre-servo gate period, and after the pre-servo gate period, enables a servo gate to read the servo sector. After reading the servo sector, the control circuitry disables the servo gate and waits for a post-servo gate period. After the post-servo gate period, the control circuitry configure the power mode into the no-op mode.Type: GrantFiled: June 8, 2009Date of Patent: July 14, 2015Assignee: Western Digitial Technologies, Inc.Inventor: Steven R. Vasquez
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Patent number: 9001449Abstract: Some embodiments of the invention are directed to a data storage system that includes a disk and solid-state non-volatile memory (NVM). During a power failure, the data storage system may use back EMF (BEMF) voltage from the spindle motor of the disk to park the heads of the disk and/or store data in the NVM. In one embodiment, a demand regulation circuit regulates loads that use voltage generated from the BEMF. The demand regulation circuit may be used to selectively cause a controller to adjust the rate of programming to the NVM in order to reduce the load. For example, the demand regulation circuit may assert a throttle signal to the controller upon detecting that the voltage generated from the BEMF is below a certain threshold. Programming rate may be throttled, programming cycles may be staggered, and/or programming time may be lengthened. Throttling may enable the use of smaller circuitry.Type: GrantFiled: November 7, 2013Date of Patent: April 7, 2015Assignee: Western Digital Technologies, Inc.Inventors: George J. Bennett, Steven R. Vasquez, Robert P. Ryan
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Patent number: 8912778Abstract: A switching voltage regulator is disclosed including a charging element operable to generate an output voltage. The charging element is configured during a cycle, including to charge the charging element for an on-time, discharge the charging element for a discharge time, and tristate the charging element for a tristate time. Prior to a power mode changing which increases the current demand of the load, the on-time is increased.Type: GrantFiled: July 31, 2009Date of Patent: December 16, 2014Assignee: Western Digital Technologies, Inc.Inventors: George J. Bennett, Steven R. Vasquez
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Patent number: 8908311Abstract: A data storage device is disclosed comprising a head actuated over a disk comprising a plurality of data sectors. During a first revolution of the disk, write data is first encoded into a codeword spanning at least a first data sector and a second data sector and a first part of the codeword is written to the first data sector. During a second revolution of the disk, the write data is second encoded into the codeword and a second part of the codeword is written to the second data sector.Type: GrantFiled: February 6, 2014Date of Patent: December 9, 2014Assignee: Western Digital Technologies, Inc.Inventor: Steven R. Vasquez
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Patent number: 8630054Abstract: Some embodiments of the invention are directed to a data storage system that includes a disk and solid-state non-volatile memory (NVM). During a power failure, the data storage system may use back EMF (BEMF) voltage from the spindle motor of the disk to park the heads of the disk and/or store data in the NVM. In one embodiment, a demand regulation circuit regulates loads that use voltage generated from the BEMF. The demand regulation circuit may be used to selectively cause a controller to adjust the rate of programming to the NVM in order to reduce the load. For example, the demand regulation circuit may assert a throttle signal to the controller upon detecting that the voltage generated from the BEMF is below a certain threshold. Programming rate may be throttled, programming cycles may be staggered, and/or programming time may be lengthened. Throttling may enable the use of smaller circuitry.Type: GrantFiled: September 21, 2011Date of Patent: January 14, 2014Assignee: Western Digital Technologies, Inc.Inventors: George J. Bennett, Steven R. Vasquez, Robert P. Ryan
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Patent number: 8433977Abstract: A storage device is disclosed comprising control circuitry. A write command is received from a host, wherein the write command comprises a host block and corresponding host block address. The host block is partitioned into a plurality of sub blocks, and a plurality of sub block addresses are generated in response to the host block address, wherein each sub block address corresponds to one of the sub blocks. Error detection code (EDC) data is generated for each sub block in response to the sub block and corresponding sub block address. Each sub block and corresponding EDC data are combined to generate a plurality of partial codewords that are written to one or more data sectors corresponding to the sub block addresses.Type: GrantFiled: April 13, 2009Date of Patent: April 30, 2013Assignee: Western Digital Technologies, Inc.Inventors: Steven R. Vasquez, Patrick J. Lee
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Patent number: 8413010Abstract: A data storage device is disclosed that receives a read command from a host, wherein the read command comprises a read logical block address (LBA_R). A target data sector is read in response to the LBA_R to generate a read signal. The read signal is processed to detect user data and redundancy data using a soft-output detector that outputs quality metrics for the user data and redundancy data. A high quality metric is assigned to the LBA_R, and errors are corrected in the user data using an error correction code (ECC) decoder in response to the quality metrics output by the soft-output detector and the quality metrics assigned to the LBA_R.Type: GrantFiled: March 12, 2009Date of Patent: April 2, 2013Assignee: Western Digital Technologies, Inc.Inventors: Steven R. Vasquez, Patrick J. Lee
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Publication number: 20130070363Abstract: Some embodiments of the invention are directed to a data storage system that includes a disk and solid-state non-volatile memory (NVM). During a power failure, the data storage system may use back EMF (BEMF) voltage from the spindle motor of the disk to park the heads of the disk and/or store data in the NVM. In one embodiment, a demand regulation circuit regulates loads that use voltage generated from the BEMF. The demand regulation circuit may be used to selectively cause a controller to adjust the rate of programming to the NVM in order to reduce the load. For example, the demand regulation circuit may assert a throttle signal to the controller upon detecting that the voltage generated from the BEMF is below a certain threshold. Programming rate may be throttled, programming cycles may be staggered, and/or programming time may be lengthened. Throttling may enable the use of smaller circuitry.Type: ApplicationFiled: September 21, 2011Publication date: March 21, 2013Applicant: Western Digital Technologies, Inc.Inventors: George J. Bennett, Steven R. Vasquez, Robert P. Ryan
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Patent number: 8134793Abstract: A disk drive comprising a disk, a head actuated over the disk, a read/write channel, a control processor, and a servo system is disclosed. The servo system is configured to read servo information from a servo wedge on the disk via the read/write channel, to generate first and second status information based on the read servo information, to output the first and second status information to the control processor, and to output first and second interrupt signals to the control processor, the first and second interrupt signals being spaced apart by a time delay. In response to the first interrupt signal, the control processor is configured to determine whether to release data from a host based on the first status information, and in response to the second interrupt signal, the control processor is configured to determine whether to release data from the host based on the second status information.Type: GrantFiled: June 17, 2010Date of Patent: March 13, 2012Assignee: Western Digital Technologies, Inc.Inventors: Steven R. Vasquez, George J. Bennett
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Patent number: 8090902Abstract: A disk drive is disclosed comprising a disk having a plurality of tracks, wherein each track comprises a plurality of data sectors. The disk drive further comprises a head actuated over the disk, and control circuitry fabricated on a die. A plurality of disk access commands are received from a host and stored in a command queue, wherein each disk access command identifies at least one data sector. A temperature of the die is determined, and a first disk access command is selected from the command queue in response to the die temperature.Type: GrantFiled: May 22, 2009Date of Patent: January 3, 2012Assignee: Western Digital Technologies, Inc.Inventors: George J. Bennett, Steven R. Vasquez
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Patent number: 8019914Abstract: A disk drive is disclosed having a disk, a head actuated over the disk, a buffer memory for storing control routine op codes and control routine data, and a microprocessor for receiving the control routine op codes and control routine data. Control circuitry within the disk drive services an access request generated by the microprocessor by accessing the buffer memory, and monitors at least one interrupt. If the interrupt occurs while servicing the access request, the control circuitry enables the microprocessor to execute an interrupt service routine corresponding to the interrupt. Enabling the microprocessor to execute the interrupt service routine rather than wait for the access request reduces the latency in servicing the interrupt.Type: GrantFiled: October 7, 2005Date of Patent: September 13, 2011Assignee: Western Digital Technologies, Inc.Inventors: Steven R. Vasquez, Carl E. Bonke
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Patent number: 7929238Abstract: A disk drive is disclosed comprising a disk having a plurality of servo sectors defining a plurality of servo tracks that form a plurality of servo zones. The disk drive further comprises a head actuated radially over the disk for generating a read signal, and control circuitry operable to execute a seek operation. A fixed rate clock is generated, and a disk locked clock is generated and synchronized to the servo data rate of the servo zone the head is over. The disk locked clock is used to generate a servo timing window relative to a circumferential location of the head and the servo sectors. The control circuitry seeks the head from the first servo zone to the second servo zone, and switches to the fixed rate clock to generate the servo timing window while the head transitions from the first servo zone to the second servo zone.Type: GrantFiled: October 14, 2008Date of Patent: April 19, 2011Assignee: Western Digital Technologies, Inc.Inventor: Steven R. Vasquez
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Patent number: 7539924Abstract: A disk drive is disclosed including a disk having a plurality of data tracks, wherein each data track includes a plurality of data sectors. A head is actuated over the disk for accessing the data sectors. A write command is received from a host, wherein the write command includes a host block and corresponding host block address. The host block is partitioned into a plurality of sub blocks, and a plurality of sub block addresses are generated in response to the host block address, wherein each sub block address corresponds to one of the sub blocks. Error detection code (EDC) data is generated for each sub block in response to the sub block and corresponding sub block address. Each sub block and corresponding EDC data are combined to generate a plurality of partial codewords that are written to the data sectors corresponding to the sub block addresses.Type: GrantFiled: November 15, 2005Date of Patent: May 26, 2009Assignee: Western Digital Technologies, Inc.Inventors: Steven R. Vasquez, Patrick J. Lee
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Patent number: 7129763Abstract: A method and apparatus is disclosed for adjusting at least one of a supply voltage and a clocking frequency applied to digital circuitry of a computing device, wherein the digital circuitry comprises a critical path circuit. A propagation delay frequency representing a propagation delay of the critical path circuit is generated, and a frequency error signal is generated representing a difference between a reference frequency and the propagation delay frequency. At least one of the supply voltage and the clocking frequency is adjusted in response to the frequency error signal.Type: GrantFiled: November 8, 2004Date of Patent: October 31, 2006Assignee: Western Digital Technologies, Inc.Inventors: George J. Bennett, Steven R. Vasquez
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Patent number: 7110202Abstract: A disk drive is disclosed comprising a disk surface having a plurality of concentric, radially spaced tracks, wherein each track comprises a plurality of data sectors and a plurality of servo sectors. At least two different index marks are distributed around the circumference of the disk surface. A servo sector counter is initialized relative to which index mark is detected, wherein the servo sector counter identifies a circumferential location of the servo sectors.Type: GrantFiled: October 31, 2003Date of Patent: September 19, 2006Assignee: Western Digital Technologies, Inc.Inventor: Steven R. Vasquez