Patents by Inventor Steven S. Cheng
Steven S. Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8924626Abstract: A method and system for phasing power-intensive operations is disclosed. A non-volatile storage device controller detects a power reset. The controller is in communication with non-volatile memories in the non-volatile storage device. In response to detecting a power reset, the controller determines a current consumption necessary to reset the non-volatile memories in the non-volatile storage device. The controller simultaneously resets all of the non-volatile memories when the determined current consumption is less than a current consumption threshold. If the determined current consumption is greater than the current consumption threshold, the controller resets a first subset of the plurality of non-volatile memories, and after a predetermined delay, resets a second subset of the non-volatile memories. Therefore, a power-intensive operation may be performed without exceeding a current consumption threshold by dividing the operation into a sequence of steps that do not exceed the threshold.Type: GrantFiled: April 29, 2010Date of Patent: December 30, 2014Assignee: SanDisk Technologies Inc.Inventors: Steven S. Cheng, Dennis Ea, Jianmin Huang, Alexander Kwok-Tung Mak, Farookh Moogat
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Patent number: 8413015Abstract: A nonvolatile memory system includes a memory controller in communication with multiple memory dies through multiple memory interfaces. Multiple ECC blocks are provided to decode data from the multiple memory interfaces. ECC blocks are provided with a clock signal that may have a frequency that is lower than another clock signal that is provided to a host interface.Type: GrantFiled: September 21, 2009Date of Patent: April 2, 2013Assignee: SanDisk Technologies Inc.Inventors: Steven S. Cheng, Aruna Gutta
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Patent number: 8406076Abstract: A method and apparatus for reducing power consumption during an operation in a non-volatile storage device is disclosed. A non-volatile storage device controller that is in communication with a non-volatile memory in the non-volatile storage device receives a characteristic corresponding to a time duration required for the non-volatile memory to complete an operation. The controller disables a circuit that indicates when an operation by the non-volatile memory is complete. The controller then initiates the operation in the non-volatile memory, and maintains the circuit in a disabled state for a first predetermined time that is a portion of the time duration. The controller enables the circuit upon expiration of the first predetermined time and prior to the completion of the operation. The controller receives an indication of the completion of the operation via the circuit.Type: GrantFiled: June 28, 2010Date of Patent: March 26, 2013Assignee: SanDisk Technologies Inc.Inventors: Steven S. Cheng, Peter Hwang, Annie C. Chang
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Patent number: 8301912Abstract: Data scrambling techniques implemented externally to a flash memory device are disclosed which can be used in concert with flash memory on-chip copy functionality operating internally to the flash device, thus supporting high performance copying operations. All the data stored in the flash may be scrambled, including headers and control structures. Robust file system operation may be achieved, including the capability to tolerate a power loss at any time, and yet be able to relocate data internally within the flash without having to de-scramble and then re-scramble the data. An exemplary hardware based solution has little or no impact on overall system performance, and may be implemented at very low incremental cost to increase overall system reliability. The data scrambling technique preferably uses a logical address, such as logical block address or logical page address, rather than a physical address, to determine a seed scrambling key.Type: GrantFiled: December 30, 2008Date of Patent: October 30, 2012Assignee: SanDisk Technologies Inc.Inventors: Jason T. Lin, Steven S. Cheng, Shai Traister
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Patent number: 8161231Abstract: A memory card has a data scrambler that performs a data scrambling operation on data stored in the memory card according to a device ID associated with the memory card. The device ID is either set at the factory and permanently stored in the card, or configurable by a user or a host system.Type: GrantFiled: March 7, 2011Date of Patent: April 17, 2012Assignee: SanDisk Technologies Inc.Inventor: Steven S. Cheng
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Publication number: 20110320686Abstract: A method and apparatus for reducing power consumption during an operation in a non-volatile storage device is disclosed. A non-volatile storage device controller that is in communication with a non-volatile memory in the non-volatile storage device receives a characteristic corresponding to a time duration required for the non-volatile memory to complete an operation. The controller disables a circuit that indicates when an operation by the non-volatile memory is complete. The controller then initiates the operation in the non-volatile memory, and maintains the circuit in a disabled state for a first predetermined time that is a portion of the time duration. The controller enables the circuit upon expiration of the first predetermined time and prior to the completion of the operation. The controller receives an indication of the completion of the operation via the circuit.Type: ApplicationFiled: June 28, 2010Publication date: December 29, 2011Inventors: Steven S. Cheng, Peter Hwang, Annie C. Chang
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Publication number: 20110271036Abstract: A method and system for phasing power-intensive operations is disclosed. A non-volatile storage device controller detects a power reset. The controller is in communication with non-volatile memories in the non-volatile storage device. In response to detecting a power reset, the controller determines a current consumption necessary to reset the non-volatile memories in the non-volatile storage device. The controller simultaneously resets all of the non-volatile memories when the determined current consumption is less than a current consumption threshold. If the determined current consumption is greater than the current consumption threshold, the controller resets a first subset of the plurality of non-volatile memories, and after a predetermined delay, resets a second subset of the non-volatile memories. Therefore, a power-intensive operation may be performed without exceeding a current consumption threshold by dividing the operation into a sequence of steps that do not exceed the threshold.Type: ApplicationFiled: April 29, 2010Publication date: November 3, 2011Inventors: Steven S. Cheng, Dennis Ea, Jianmin Huang, Alexander Kwok-Tung Mak, Farookh Moogat
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Publication number: 20110161573Abstract: A memory card has a data scrambler that performs a data scrambling operation on data stored in the memory card according to a device ID associated with the memory card. The device ID is either set at the factory and permanently stored in the card, or configurable by a user or a host system.Type: ApplicationFiled: March 7, 2011Publication date: June 30, 2011Inventor: Steven S. Cheng
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Patent number: 7971023Abstract: In order to maintain a memory system's performance levels to its end-of-life, latency threshold level(s) are specified and associated with different memory system operating parameters. In one embodiment, the memory system monitors and gathers performance statistics in real time, and in accordance with specific memory transfer sizes. A current latency level can be dynamically calculated using the performance statistics and compared to previously established latency threshold levels. If the current latency level is greater than or equal to a specific latency threshold level, the memory system's configuration setting can be adjusted according to the operating parameters associated with the latency threshold level to offset the increased latency.Type: GrantFiled: April 30, 2008Date of Patent: June 28, 2011Assignee: SanDisk CorporationInventors: Steven S. Cheng, Stephen Tam
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Patent number: 7953930Abstract: A memory card has a data scrambler that performs a data scrambling operation on data stored in the memory card according to a device ID associated with the memory card. The device ID is either set at the factory and permanently stored in the card, or configurable by a user or a host system.Type: GrantFiled: December 7, 2007Date of Patent: May 31, 2011Assignee: SanDisk CorporationInventor: Steven S. Cheng
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Publication number: 20110072328Abstract: A nonvolatile memory system includes a memory controller in communication with multiple memory dies through multiple memory interfaces. Multiple ECC blocks are provided to decode data from the multiple memory interfaces. ECC blocks are provided with a clock signal that may have a frequency that is lower than another clock signal that is provided to a host interface.Type: ApplicationFiled: September 21, 2009Publication date: March 24, 2011Applicant: SANDISK CORPORATIONInventors: Steven S. CHENG, Aruna GUTTA
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Patent number: 7873803Abstract: A nonvolatile memory array includes two or more devices, each device containing data that is scrambled using a different scrambling scheme. When the same data is provided and stored in both devices, different data patterns occur in each device, so that if one of the patterns causes data pattern induced errors, the original data can be recreated from another copy that does not share the same data pattern.Type: GrantFiled: September 25, 2007Date of Patent: January 18, 2011Assignee: SanDisk CorporationInventor: Steven S. Cheng
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Publication number: 20090276570Abstract: In order to maintain a memory system's performance levels to its end-of-life, latency threshold level(s) are specified and associated with different memory system operating parameters. In one embodiment, the memory system monitors and gathers performance statistics in real time, and in accordance with specific memory transfer sizes. A current latency level can be dynamically calculated using the performance statistics and compared to previously established latency threshold levels. If the current latency level is greater than or equal to a specific latency threshold level, the memory system's configuration setting can be adjusted according to the operating parameters associated with the latency threshold level to offset the increased latency.Type: ApplicationFiled: April 30, 2008Publication date: November 5, 2009Applicant: SANDISK CORPORATIONInventors: Steven S. CHENG, Stephen TAM
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Publication number: 20090204824Abstract: Data scrambling techniques implemented externally to a flash memory device are disclosed which can be used in concert with flash memory on-chip copy functionality operating internally to the flash device, thus supporting high performance copying operations. All the data stored in the flash may be scrambled, including headers and control structures. Robust file system operation may be achieved, including the capability to tolerate a power loss at any time, and yet be able to relocate data internally within the flash without having to de-scramble and then re-scramble the data. An exemplary hardware based solution has little or no impact on overall system performance, and may be implemented at very low incremental cost to increase overall system reliability. The data scrambling technique preferably uses a logical address, such as logical block address or logical page address, rather than a physical address, to determine a seed scrambling key.Type: ApplicationFiled: December 30, 2008Publication date: August 13, 2009Inventors: Jason T. Lin, Steven S. Cheng, Shai Traister
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Publication number: 20090150596Abstract: A memory card has a data scrambler that performs a data scrambling operation on data stored in the memory card according to a device ID associated with the memory card. The device ID is either set at the factory and permanently stored in the card, or configurable by a user or a host system.Type: ApplicationFiled: December 7, 2007Publication date: June 11, 2009Inventor: Steven S. Cheng
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Publication number: 20090083485Abstract: A nonvolatile memory array includes two or more devices, each device containing data that is scrambled using a different scrambling scheme. When the same data is provided and stored in both devices, different data patterns occur in each device, so that if one of the patterns causes data pattern induced errors, the original data can be recreated from another copy that does not share the same data pattern.Type: ApplicationFiled: September 25, 2007Publication date: March 26, 2009Inventor: Steven S. Cheng
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Patent number: 4712859Abstract: A distributed star network for providing point-to-point and broadcast-type communication among a plurality of user stations is disclosed. The distributed star network is implemented using single mode optical technology including single mode lasers and single mode optical fibers.Type: GrantFiled: September 19, 1985Date of Patent: December 15, 1987Assignee: Bell Communications Research, Inc.Inventors: Andres Albanese, Steven S. Cheng
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Patent number: 4705350Abstract: An optical communications network which connects a central office with a plurality of user stations is disclosed.In the central office, the power from a single cw laser is divided over a plurality of single mode optical fibers to transmit information from the central office to the user stations. Each user station includes a directly modulated LED for transmitting information to the central office.Type: GrantFiled: September 19, 1985Date of Patent: November 10, 1987Assignee: Bell Communications Research, Inc.Inventor: Steven S. Cheng
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Patent number: 4658394Abstract: An optical distribution architecture is disclosed wherein wavelength stabilized continuous wavelength lasers are centrally positioned in tandem with star couplers to distributed laser power among a plurality of lightguide paths. The laser power apportioned to each such path may then be locally or remotely modulated thereby reducing the number of lasers required to equip a network. Advantageously, lightguide fibres are single mode and polarization maintaining.Type: GrantFiled: December 12, 1984Date of Patent: April 14, 1987Assignees: Bell Communications Research, Inc., AT&T Bell LaboratoriesInventors: Steven S. Cheng, Jan Lipson, Stewart D. Personick
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Patent number: RE45697Abstract: Data scrambling techniques implemented externally to a flash memory device are disclosed which can be used in concert with flash memory on-chip copy functionality operating internally to the flash device, thus supporting high performance copying operations. All the data stored in the flash may be scrambled, including headers and control structures. Robust file system operation may be achieved, including the capability to tolerate a power loss at any time, and yet be able to relocate data internally within the flash without having to de-scramble and then re-scramble the data. An exemplary hardware based solution has little or no impact on overall system performance, and may be implemented at very low incremental cost to increase overall system reliability. The data scrambling technique preferably uses a logical address, such as logical block address or logical page address, rather than a physical address, to determine a seed scrambling key.Type: GrantFiled: April 1, 2014Date of Patent: September 29, 2015Assignee: SanDisk Technologies Inc.Inventors: Jason T Lin, Steven S Cheng, Shai Traister