Patents by Inventor Steven Tanghe

Steven Tanghe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11728090
    Abstract: Micro-scale devices, such as transformers and capacitors, having a floating conductive layer are disclosed. A floating conductive layer may be disposed in an insulator layer and can reduce a maximum electric field between a first planar conductor and a second planar conductor of a micro-scale passive device. Reduction of a maximum electric field between a first planar conductor and a second planar conductor can reduce undesirable effects on electrical components.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: August 15, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Patrick M. McGuinness, Paul Lambkin, Laurence B. O'Sullivan, Bernard Patrick Stenson, Steven Tanghe, Baoxing Chen
  • Patent number: 11519954
    Abstract: An apparatus and methods to operate the same to provide fast fault-detection on power semiconductor devices such as power transistors are disclosed. In some embodiment, a desaturation based fault-detection circuit for a power transistor is provided. The fault-detection circuit has an adaptable blanking time and a disconnect switch in the blanking mechanism that allow for quick enabling of fault-detection mechanisms to achieve fast fault detection times on power semiconductor devices.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: December 6, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventors: Deepak Gunasekaran, Michael John Collins, Kenneth G. Richardson, Art Zirger, Steven Tanghe, Brian Jadus
  • Patent number: 11387316
    Abstract: Isolators having a back-to-back configuration for providing electrical isolation between two circuits are described, in which multiple isolators formed on a single monolithic substrate are connect in series to achieve a higher amount of electrical isolation for a single substrate than for one of the isolators alone. A pair of isolators in the back-to-back configuration have top and bottom isolator components where the top isolator components are connected together and electrically isolated from the underlying substrate, resulting in floating top isolator components. The back-to-back isolator may provide one or more communication channels for transfer of information and/or power between different circuits.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: July 12, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventors: Steven Tanghe, Patrick M. McGuinness
  • Publication number: 20210249185
    Abstract: Micro-scale devices, such as transformers and capacitors, having a floating conductive layer are disclosed. A floating conductive layer may be disposed in an insulator layer and can reduce a maximum electric field between a first planar conductor and a second planar conductor of a micro-scale passive device. Reduction of a maximum electric field between a first planar conductor and a second planar conductor can reduce undesirable effects on electrical components.
    Type: Application
    Filed: February 10, 2020
    Publication date: August 12, 2021
    Applicant: Analog Devices International Unlimited Company
    Inventors: Patrick M. McGuinness, Paul Lambkin, Laurence B. O'Sullivan, Bernard Patrick Stenson, Steven Tanghe, Baoxing Chen
  • Publication number: 20210167169
    Abstract: Isolators having a back-to-back configuration for providing electrical isolation between two circuits are described, in which multiple isolators formed on a single monolithic substrate are connect in series to achieve a higher amount of electrical isolation for a single substrate than for one of the isolators alone. A pair of isolators in the back-to-back configuration have top and bottom isolator components where the top isolator components are connected together and electrically isolated from the underlying substrate, resulting in floating top isolator components. The back-to-back isolator may provide one or more communication channels for transfer of information and/or power between different circuits.
    Type: Application
    Filed: December 2, 2019
    Publication date: June 3, 2021
    Applicant: Analog Devices International Unlimited Company
    Inventors: Steven Tanghe, Patrick M. McGuinness
  • Publication number: 20210063468
    Abstract: An apparatus and methods to operate the same to provide fast fault-detection on power semiconductor devices such as power transistors are disclosed. In some embodiment, a desaturation based fault-detection circuit for a power transistor is provided. The fault-detection circuit has an adaptable blanking time and a disconnect switch in the blanking mechanism that allow for quick enabling of fault-detection mechanisms to achieve fast fault detection times on power semiconductor devices.
    Type: Application
    Filed: July 21, 2020
    Publication date: March 4, 2021
    Applicant: Analog Devices International Unlimited Company
    Inventors: Deepak Gunasekaran, Michael John Collins, Kenneth G. Richardson, Art Zirger, Steven Tanghe, Brian Jadus
  • Patent number: 9960752
    Abstract: Multiple termination impedance values are provided in a switchable termination circuit so as to accommodate multiple transmission line characteristics. In one example, a termination matching circuit includes first and second nodes, a series interconnection of a first switch and a first impedance coupled between the first and second nodes, and another series interconnection of a second switch and a second impedance coupled between the first and second nodes. First and second control circuits respectively control the first and second switches such that a selectable impedance is provided between the first and second nodes through selective activation of the first and second switch devices by the first and second control circuits. In another example, additional nodes and resistors are provided to provide further termination impedance values.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: May 1, 2018
    Assignee: Linear Technology Corporation
    Inventors: Steven Tanghe, Ciaran J. Brennan
  • Publication number: 20170310306
    Abstract: Multiple termination impedance values are provided in a switchable termination circuit so as to accommodate multiple transmission line characteristics. In one example, a termination matching circuit includes first and second nodes, a series interconnection of a first switch and a first impedance coupled between the first and second nodes, and another series interconnection of a second switch and a second impedance coupled between the first and second nodes. First and second control circuits respectively control the first and second switches such that a selectable impedance is provided between the first and second nodes through selective activation of the first and second switch devices by the first and second control circuits. In another example, additional nodes and resistors are provided to provide further termination impedance values.
    Type: Application
    Filed: April 21, 2017
    Publication date: October 26, 2017
    Inventors: Steven TANGHE, Ciaran J. BRENNAN
  • Patent number: 9256570
    Abstract: This disclosure describes a circuit implementation providing the functions necessary to implement an isolated I2C bidirectional port. The technique implements a current source as a pull up device on at least one side of the isolation system. The circuit manages and communicates bidirectional data across an isolation barrier. A method of communicating bidirectional signals and an I2C acknowledge (ACK) or clock stretching through an isolation channel is disclosed.
    Type: Grant
    Filed: August 5, 2011
    Date of Patent: February 9, 2016
    Assignee: LINEAR TECHNOLOGY CORPORATION
    Inventors: Brian K. Jadus, Steven Tanghe
  • Publication number: 20130036247
    Abstract: This disclosure describes a circuit implementation providing the functions necessary to implement an isolated I2C bidirectional port. The technique implements a current source as a pull up device on at least one side of the isolation system. The circuit manages and communicates bidirectional data across an isolation barrier. A method of communicating bidirectional signals and an I2C acknowledge (ACK) or clock stretching through an isolation channel is disclosed.
    Type: Application
    Filed: August 5, 2011
    Publication date: February 7, 2013
    Applicant: LINEAR TECHNOLOGY CORPORATION
    Inventors: Brian K. Jadus, Steven Tanghe