Patents by Inventor Steven Theiss
Steven Theiss has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080044556Abstract: In one embodiment, the invention is directed to aperture mask deposition techniques using aperture mask patterns formed in one or more elongated webs of flexible film. The techniques involve sequentially depositing material through mask patterns formed in the film to define layers, or portions of layers, of the circuit. A deposition substrate can also be formed from an elongated web, and the deposition substrate web can be fed through a series of deposition stations. Each deposition station may have an elongated web formed with aperture mask patterns. The elongated web of mask patterns feeds in a direction perpendicular to the deposition substrate web. In this manner, the circuit creation process can be performed in-line. Moreover, the process can be automated to reduce human error and increase throughput.Type: ApplicationFiled: October 23, 2007Publication date: February 21, 2008Inventors: Paul Baude, Patrick Fleming, Michael Haase, Tommie Kelley, Dawn Muyres, Steven Theiss
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Publication number: 20080038935Abstract: Aperture masks and deposition techniques for using aperture masks are described. In addition, techniques for creating aperture masks and other techniques for using the aperture masks are described. The various techniques can be particularly useful in creating circuit elements for electronic displays and low-cost integrated circuits such as radio frequency identification (RFID) circuits. In addition, the techniques can be advantageous in the fabrication of integrated circuits incorporating organic semiconductors, which typically are not compatible with wet processes.Type: ApplicationFiled: July 9, 2007Publication date: February 14, 2008Inventors: Paul BAUDE, Patrick Fleming, Michael Haase, Tommie Kelley, Dawn Muyres, Steven Theiss
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Patent number: 7297361Abstract: A method for circuit fabrication includes positioning first and second webs of film in proximity to each other, wherein the second web of film defines a deposition mask, and deposition material on the first web of film through the deposition mask pattern defined by the second web of the to create at least a portion of an integrated circuit.Type: GrantFiled: September 14, 2004Date of Patent: November 20, 2007Assignee: 3M Innovative Properties CompanyInventors: Paul F. Baude, Patrick R. Fleming, Michael A. Haase, Tommie W. Kelley, Dawn V. Muyres, Steven Theiss
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Publication number: 20070215709Abstract: An RFID-based sensor includes a plurality of discrete sensor elements. Each sensor element changes conductivity state based on exposure of the sensor to a physical condition. An RFID circuit coupled to the plurality of sensor elements transmits a code corresponding to the conductivity states of the of sensor elements. The code may comprise the identification code of the RFID circuit. A level of exposure to the condition or a duration of exposure to the condition may be indicated by the code. Each of the sensor elements may be sensitive to a distinct condition and the code may indicate exposure to each of the distinct conditions. The code may indicate a prior exposure to a condition or may indicate a present exposure to the condition.Type: ApplicationFiled: March 15, 2006Publication date: September 20, 2007Inventors: Paul Baude, Steven Theiss
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Publication number: 20070178710Abstract: A method for sealing thin film transistors comprises providing a thin film transistor comprising a gate electrode, a gate dielectric, a source and a drain electrode, and an semiconductor layer; and vapor depositing a sealing material on at least a portion of the semiconductor layer through a pattern of an aperture mask.Type: ApplicationFiled: August 18, 2003Publication date: August 2, 2007Inventors: Dawn Muyres, Tommie Kelley, Michael Haase, Paul Baude, Steven Theiss
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Patent number: 7241688Abstract: Aperture masks and deposition techniques for using aperture masks are described. In addition, techniques for creating aperture masks and other techniques for using the aperture masks are described. The various techniques can be particularly useful in creating circuit elements for electronic displays and low-cost integrated circuits such as radio frequency identification (RFID) circuits. In addition, the techniques can be advantageous in the fabrication of integrated circuits incorporating organic semiconductors, which typically are not compatible with wet processes.Type: GrantFiled: April 29, 2005Date of Patent: July 10, 2007Assignee: 3M Innovative Properties CompanyInventors: Paul F. Baude, Patrick R. Fleming, Michael A. Haase, Tommie W. Kelley, Dawn V. Muyres, Steven Theiss
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Publication number: 20070070661Abstract: Logic circuitry is powered by a partially rectified alternating current (ac) waveform. The waveform is partially rectified in the sense that it does not provide a clean, primarily dc power signal. Instead, it is possible to power logic circuitry with a waveform that includes a substantial ac component. The partially rectified ac waveform may be applied to logic circuitry incorporating thin film transistors based on amorphous or polycrystalline organic semiconductors, inorganic semiconductors or combinations of both.Type: ApplicationFiled: June 15, 2006Publication date: March 29, 2007Inventors: Paul Baude, Michael Haase, Steven Theiss
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Publication number: 20060128165Abstract: A method of patterning surface modification by (a) positioning a repositionable aperture mask in proximity to a substrate, and (b) selectively exposing a portion of the substrate to a surface modification treatment, wherein the exposed portion is defined by one or more apertures in the aperture mask.Type: ApplicationFiled: December 13, 2004Publication date: June 15, 2006Inventors: Steven Theiss, Timothy Dunbar
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Publication number: 20060091793Abstract: Methods and displays utilize row and column drivers with ZnO channels that control pixel transistors with ZnO channels, which in turn address OLEDs of an array to produce images of a display screen. A display backplane including the ZnO row and column drivers and the OLEDs may be constructed by utilizing aperture masking or a combination of photolithography and aperture masking. Monolithic integration of the ZnO row and column drivers together with the ZnO pixel transistors is thereby achieved.Type: ApplicationFiled: November 2, 2004Publication date: May 4, 2006Inventors: Paul Baude, Steven Theiss, Michael Haase, Eric Hemmesch
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Publication number: 20060057857Abstract: In various embodiments, the invention is directed to aperture mask deposition techniques for use in creating integrated circuits or integrated circuit elements. In other embodiments, the invention is directed to different apparatuses that facilitate the deposition techniques. The techniques generally involve sequentially depositing material through a number of aperture masks formed with patterns that define layers or portions of various layers of a circuit. In this manner, circuits can be created using aperture mask deposition techniques, without requiring any etching or photolithography, which is particularly useful when organic semiconductors are involved. The techniques can be useful in creating circuit elements for electronic displays, low-cost integrated circuits such as radio frequency identification (RFID) circuits, and other circuits.Type: ApplicationFiled: October 25, 2005Publication date: March 16, 2006Inventors: Patrick Fleming, Michael Haase, Tommie Kelley, Dawn Muyres, Steven Theiss
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Publication number: 20050191572Abstract: Aperture masks and deposition techniques for using aperture masks are described. In addition, techniques for creating aperture masks and other techniques for using the aperture masks are described. The various techniques can be particularly useful in creating circuit elements for electronic displays and low-cost integrated circuits such as radio frequency identification (RFID) circuits. In addition, the techniques can be advantageous in the fabrication of integrated circuits incorporating organic semiconductors, which typically are not compatible with wet processes.Type: ApplicationFiled: April 29, 2005Publication date: September 1, 2005Inventors: Paul Baude, Patrick Fleming, Michael Haase, Tommie Kelley, Dawn Muyres, Steven Theiss
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Publication number: 20050134318Abstract: Logic circuitry is powered by a partially rectified alternating current (ac) waveform. The waveform is partially rectified in the sense that it does not provide a clean, primarily dc power signal. Instead, it is possible to power logic circuitry with a waveform that includes a substantial ac component. The partially rectified ac waveform may be applied to logic circuitry incorporating thin film transistors based on amorphous or polycrystalline organic semiconductors, inorganic semiconductors or combinations of both.Type: ApplicationFiled: December 17, 2003Publication date: June 23, 2005Inventors: Paul Baude, Michael Haase, Steven Theiss
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Publication number: 20050130422Abstract: A process for patterning films comprises the steps of (a) vapor depositing resist material onto a film disposed on a substrate through a repositionable aperture mask, and (b) using a subtractive process to remove the exposed portion of the film.Type: ApplicationFiled: December 12, 2003Publication date: June 16, 2005Inventor: Steven Theiss
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Patent number: 6897164Abstract: Aperture masks and deposition techniques for using aperture masks are described. In addition, techniques for creating aperture masks and other techniques for using the aperture masks are described. The various techniques can be particularly useful in creating circuit elements for electronic displays and low-cost integrated circuits such as radio frequency identification (RFID) circuits. In addition, the techniques can be advantageous in the fabrication of integrated circuits incorporating organic semiconductors, which typically are not compatible with wet processes.Type: GrantFiled: February 14, 2002Date of Patent: May 24, 2005Assignee: 3M Innovative Properties CompanyInventors: Paul F. Baude, Patrick R. Fleming, Michael A. Haase, Tommie W. Kelley, Dawn V. Muyres, Steven Theiss
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Publication number: 20050079418Abstract: In one embodiment, the invention is directed to aperture mask deposition techniques using aperture mask patterns formed in one or more elongated webs of flexible film. The techniques involve sequentially depositing material through mask patterns formed in the film to define layers, or portions of layers, of the thin film battery. A deposition substrate can also be formed from an elongated web, and the deposition substrate web can be fed through a series of deposition stations.Type: ApplicationFiled: October 14, 2003Publication date: April 14, 2005Inventors: Tommie Kelley, Steven Theiss, Dawn Muyres, Paul Baude, Michael Haase
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Publication number: 20050042365Abstract: In one embodiment, the invention is directed to aperture mask deposition techniques using aperture mask patterns formed in one or more elongated webs of flexible film. The techniques involve sequentially depositing material through mask patterns formed in the film to define layers, or portions of layers, of the circuit. A deposition substrate can also be formed from an elongated web, and the deposition substrate web can be fed through a series of deposition stations. Each deposition station may have an elongated web formed with aperture mask patterns. The elongated web of mask patterns feeds in a direction perpendicular to the deposition substrate web. In this manner, the circuit creation process can be performed in-line. Moreover, the process can be automated to reduce human error and increase throughput.Type: ApplicationFiled: September 14, 2004Publication date: February 24, 2005Inventors: Paul Baude, Patrick Fleming, Michael Haase, Tommie Kelley, Dawn Muyres, Steven Theiss
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Patent number: 6821348Abstract: In one embodiment, the invention is directed to aperture mask deposition techniques using aperture mask patterns formed in one or more elongated webs of flexible film. The techniques involve sequentially depositing material through mask patterns formed in the film to define layers, or portions of layers, of the circuit. A deposition substrate can also be formed from an elongated web, and the deposition substrate web can be fed through a series of deposition stations. Each deposition station may have an elongated web formed with aperture mask patterns. The elongated web of mask patterns feeds in a direction perpendicular to the deposition substrate web. In this manner, the circuit creation process can be performed in-line. Moreover, the process can be automated to reduce human error and increase throughput.Type: GrantFiled: February 14, 2002Date of Patent: November 23, 2004Assignee: 3M Innovative Properties CompanyInventors: Paul F. Baude, Patrick R. Fleming, Michael A. Haase, Tommie W. Kelley, Dawn V. Muyres, Steven Theiss
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Publication number: 20030152691Abstract: In one embodiment, the invention is directed to aperture mask deposition techniques using aperture mask patterns formed in one or more elongated webs of flexible film. The techniques involve sequentially depositing material through mask patterns formed in the film to define layers, or portions of layers, of the circuit. A deposition substrate can also be formed from an elongated web, and the deposition substrate web can be fed through a series of deposition stations. Each deposition station may have an elongated web formed with aperture mask patterns. The elongated web of mask patterns feeds in a direction perpendicular to the deposition substrate web. In this manner, the circuit creation process can be performed in-line. Moreover, the process can be automated to reduce human error and increase throughput.Type: ApplicationFiled: February 14, 2002Publication date: August 14, 2003Applicant: 3M Innovative Properties CompanyInventors: Paul F. Baude, Patrick R. Fleming, Michael A. Haase, Tommie W. Kelley, Dawn V. Muyres, Steven Theiss
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Publication number: 20030150384Abstract: Aperture masks and deposition techniques for using aperture masks are described. In addition, techniques for creating aperture masks and other techniques for using the aperture masks are described. The various techniques can be particularly useful in creating circuit elements for electronic displays and low-cost integrated circuits such as radio frequency identification (RFID) circuits. In addition, the techniques can be advantageous in the fabrication of integrated circuits incorporating organic semiconductors, which typically are not compatible with wet processes.Type: ApplicationFiled: February 14, 2002Publication date: August 14, 2003Applicant: 3M Innovative Properties CompanyInventors: Paul F. Baude, Patrick R. Fleming, Michael A. Haase, Tommie W. Kelley, Dawn V. Muyres, Steven Theiss
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Publication number: 20030151118Abstract: In various embodiments, the invention is directed to aperture mask deposition techniques for use in creating integrated circuits or integrated circuit elements. In other embodiments, the invention is directed to different apparatuses that facilitate the deposition techniques. The techniques generally involve sequentially depositing material through a number of aperture masks formed with patterns that define layers or portions of various layers of a circuit. In this manner, circuits can be created using aperture mask deposition techniques, without requiring any etching or photolithography, which is particularly useful when organic semiconductors are involved. The techniques can be useful in creating circuit elements for electronic displays, low-cost integrated circuits such as radio frequency identification (RFID) circuits, and other circuits.Type: ApplicationFiled: February 14, 2002Publication date: August 14, 2003Applicant: 3M Innovative Properties CompanyInventors: Paul F. Baude, Patrick R. Fleming, Michael A. Haase, Tommie W. Kelley, Dawn V. Muyres, Steven Theiss