Abstract: A circuit (10, 40) and method for autotrim of an embedded threshold voltage reference bit are provided. A FAMOS cell (12, 42) in an integrated circuit chip provides the embedded threshold voltage reference bit. The FAMOS cell (12, 42) is first programmed to a threshold voltage above a desired threshold voltage. The FAMOS cell (12, 42) is then erased to lower the threshold voltage. After erasing, the FAMOS cell (12, 42) is tested to determine whether the threshold voltage is at a desired voltage level. The erasing and testing are accomplished automatically as an on-chip process in an integrated circuit chip. The testing can be based upon a comparison with an output of an internal reference circuit (50) that is responsive to the embedded threshold voltage reference bit. The testing can also be based upon a comparison to an external voltage input or an internal voltage reference.

Abstract: This invention is a voltage divider circuit having an input voltage at a first terminal (V.sub.IN) and an output voltage at a second terminal (V.sub.OUT). The circuit includes a parallel-connected first resistor (R.sub.1) and first capacitor (C.sub.1) coupled between the first and second terminals (V.sub.IN,V.sub.OUT) and a parallel-connected second resistor (R.sub.2) and second capacitor (C.sub.2) coupled between the second terminal (V.sub.OUT) and a reference (V.sub.REF). The ratio of the ohmic value of the second resistor (R.sub.2) to the sum of the ohmic values of the first and second resistors (R.sub.1,R.sub.2) is substantially equal to the ratio of the value in farads of the first capacitor (C.sub.1) to the sum of the values in farads of the first and second capacitors (C.sub.1,C.sub.2).

Abstract: A method for detecting defects between parallel rows of conductors (ROW) in an integrated-circuit array (ARR) includes (a) connecting all alternate rows (ROW) of conductors of the array (ARR) to a first voltage (V.sub.DD) and connecting the other alternate rows (ROW) of conductors of the array (ARR) to a second voltage (V.sub.REF) different from the first voltage, while measuring the current drawn; (b) if the current does not exceed a first limit, ending the process; (c) if the current exceeds the first limit, separately repeating step (a) on first and second halves of the array rather than all of the array, with all of the rows (ROW) of conductors of the half of the array (ARR) not under test connected to the second voltage (V.sub.REF); (d) if the current exceeds a second limit for a half of the array (ARR) in step (c), repeating step (a) on each quarter of the array (ARR) in that half with all of the rows (ROW) of the array (ARR) not under test connected to the second voltage V.sub.