Patents by Inventor Steven William Maddigan

Steven William Maddigan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9367107
    Abstract: A method and system are set forth for enabling software control of a power management unit (PMU) in a System-On-a-Chip (SoC) device to effect changes in power state without having to adjust external board level states. In one embodiment, once the SoC system controller has been booted, it communicates with the PMU over a communication bus and is able to request changes in power states without requiring external trigger events. Complete remote control of power states according to the method and system set forth herein provides flexibility when debugging and testing SoC devices because there is no need to alter external board states. Also, providing programmable changes in reset states as an alternative to full system reset preserves state data so that the system can be restarted efficiently and quickly from known conditions.
    Type: Grant
    Filed: October 19, 2011
    Date of Patent: June 14, 2016
    Assignee: PSION INC.
    Inventor: Steven William Maddigan
  • Patent number: 8898502
    Abstract: A flexible and scalable bi-directional CDC interface is set forth between clock domains in a SoC device. The interface comprises a pulse sync circuit for receiving a pulse synchronized to the source clock domain and in response outputting a busy signal to the source clock domain and outputting the pulse synchronized to said destination clock domain; an input register for latching data from said source clock domain in response to a transition of said source clock in the event said busy signal is not active and preventing said data from being latched in the event said busy signal is active so as not to corrupt previously latched data; and an output register for receiving said pulse from said pulse sync circuit and in response latching said pulse from said input register on a transition of said destination clock.
    Type: Grant
    Filed: July 5, 2011
    Date of Patent: November 25, 2014
    Assignee: Psion Inc.
    Inventors: Steven William Maddigan, Dimitri Gabriel Epassa Habib
  • Publication number: 20130103935
    Abstract: A method and system are set forth for enabling software control of a power management unit (PMU) in a System-On-a-Chip (SoC) device to effect changes in power state without having to adjust external board level states. In one embodiment, once the SoC system controller has been booted, it communicates with the PMU over a communication bus and is able to request changes in power states without requiring external trigger events. Complete remote control of power states according to the method and system set forth herein provides flexibility when debugging and testing SoC devices because there is no need to alter external board states. Also, providing programmable changes in reset states as an alternative to full system reset preserves state data so that the system can be restarted efficiently and quickly from known conditions.
    Type: Application
    Filed: October 19, 2011
    Publication date: April 25, 2013
    Applicant: PSION INC.
    Inventor: Steven William MADDIGAN
  • Publication number: 20130013950
    Abstract: A flexible and scalable bi-directional CDC interface is set forth between clock domains in a SoC device. The interface comprises a pulse sync circuit for receiving a pulse synchronized to the source clock domain and in response outputting a busy signal to the source clock domain and outputting the pulse synchronized to said destination clock domain; an input register for latching data from said source clock domain in response to a transition of said source clock in the event said busy signal is not active and preventing said data from being latched in the event said busy signal is active so as not to corrupt previously latched data; and an output register for receiving said pulse from said pulse sync circuit and in response latching said pulse from said input register on a transition of said destination clock.
    Type: Application
    Filed: July 5, 2011
    Publication date: January 10, 2013
    Applicant: PSION INC.
    Inventors: Steven William Maddigan, Dimitri Gabriel Epassa Habib