Abstract: A method and apparatus for burning in a semiconductor wafer having a plurality of active devices utilizes temporary conductive interconnect layers to separately couple at least a portion of the anodes of the active devices together as well as at least a portion of the cathodes of the devices together. A simplified probed pad, having a reduced number of contacts may then be utilized to apply a substantially constant voltage or current to the devices. The temporary conductive interconnect layer may be patterned to include device level resistors or array level resistors that may be used to mitigate the effects of short circuits or open circuits on the processing of the devices.

Abstract: A method of forming a vertical cavity surface emitting laser (100, 600, 900) includes process steps for self-aligning the p-type ohmic contact (118, 518, 932), an oxide current aperture (122, 926a), and a central puck of re-phase material (560a, 936) around the optical axis of the laser.

Abstract: A method and apparatus for burning in a semiconductor wafer having a plurality of active devices utilizes temporary conductive interconnect layers to separately couple at least a portion of the anodes of the active devices together as well as at least a portion of the cathodes of the devices together. A simplified probed pad, having a reduced number of contacts may then be utilized to apply a substantially constant voltage or current to the devices. The temporary conductive interconnect layer may be patterned to include device level resistors or array level resistors that may be used to mitigate the effects of short circuits or open circuits on the processing of the devices.

Abstract: A method and apparatus for burning in a semiconductor wafer having a plurality of active devices utilizes temporary conductive interconnect layers to separately couple at least a portion of the anodes of the active devices together as well as at least a portion of the cathodes of the devices together. A simplified probed pad, having a reduced number of contacts may then be utilized to apply a substantially constant voltage or current to the devices. The temporary conductive interconnect layer may be patterned to include device level resistors or array level resistors that may be used to mitigate the effects of short circuits or open circuits on the processing of the devices.

Abstract: A method of forming a vertical cavity surface emitting laser (100, 600, 900) includes process steps for self-aligning the p-type ohmic contact (118, 518, 932), an oxide current aperture (122, 926a), and a central puck of re-phase material (560a, 936) around the optical axis of the laser.

Abstract: A method of forming a vertical cavity surface emitting laser (100, 600, 900) includes process steps for self-aligning the p-type ohmic contact (118, 518, 932), an oxide current aperture (122, 926a), and a central puck of re-phase material (560a, 936) around the optical axis of the laser.

Abstract: A method of forming a vertical cavity surface emitting laser (100, 600, 900) includes process steps for self-aligning the p-type ohmic contact (118, 518, 932), an oxide current aperture (122, 926a), and a central puck of re-phase material (560a, 936) around the optical axis of the laser.

Abstract: A three-dimensional waveguiding structure for a microcavity surface-emitting laser is described in which native aluminum oxide layers provide control of intracavity waveguiding and the laser optical mode structure of the emitted beam. Microcavity lasers described herein account for the blueshift of the emission wavelength as the laser lateral dimensions are reduced to or below the emission wavelength.