Patents by Inventor Stewart M. Perlow
Stewart M. Perlow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6617670Abstract: A surface PIN (SPIN) device and a method of fabricating such a SPIN device. The SPIN device, when activated, confines carrier injection to a small volume near the surface of the device such that the device is sufficiently conductive to simulate a planar conductor. The SPIN device comprises a P+ region and an N+ region formed in an intrinsic (I) layer. The P+ and N+ regions are separated by a lateral length of intrinsic material of length L. The length L is approximately the carrier diffusion length. When DC bias is applied across the N+ and P+ regions carriers are injected into the intrinsic region at a density exceeding 1018 carriers per cubic cm. The intrinsic region is sufficiently thin to confine the carriers near the surface of the intrinsic region. As such, in the “on” state, the SPIN device simulates a conductive material. In the “off” state, the SPIN device is no longer conductive.Type: GrantFiled: March 20, 2001Date of Patent: September 9, 2003Assignee: Sarnoff CorporationInventors: Gordon C. Taylor, Arye Rosen, Aly E. Fathy, Pradyumna K. Swain, Stewart M. Perlow
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Patent number: 6567046Abstract: A reconfigurable antenna capable of dynamic reconfigurability of several antenna parameters. Specifically, the present invention is an antenna comprising a plurality of surface PIN devices arranged in a gridlike array. Each of the SPIN devices can be individually activated or deactivated. When a SPIN device is activated, the surface of the device is injected with carriers such that a plasma is produced within the intrinsic region of the device. The plasma can be sufficiently conductive to produce conductor or metal like characteristics at the surface of the device. Various ones of the SPIN devices can be activated to electronically paint a conductive pattern upon the substrate supporting the PIN devices. Through selective activation of the SPIN devices various surface antenna patterns can be produced upon the substrate including dipoles, cross dipoles, loop antennas, Yagi-Uda type antennas, log periodic antennas, and the like.Type: GrantFiled: March 20, 2001Date of Patent: May 20, 2003Assignee: Sarnoff CorporationInventors: Gordon C. Taylor, Stewart M. Perlow, Arye Rosen, Aly E. Fathy, Sridhar Kanamaluru, Moniem Esherbiny
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Publication number: 20020039083Abstract: A reconfigurable antenna capable of dynamic reconfigurability of several antenna parameters. Specifically, the present invention is an antenna comprising a plurality of surface PIN devices arranged in a gridlike array. Each of the SPIN devices can be individually activated or deactivated. When a SPIN device is activated, the surface of the device is injected with carriers such that a plasma is produced within the intrinsic region of the device. The plasma can be sufficiently conductive to produce conductor or metal like characteristics at the surface of the device. Various ones of the SPIN devices can be activated to electronically paint a conductive pattern upon the substrate supporting the PIN devices. Through selective activation of the SPIN devices various surface antenna patterns can be produced upon the substrate including dipoles, cross dipoles, loop antennas, Yagi-Uda type antennas, log periodic antennas, and the like.Type: ApplicationFiled: March 20, 2001Publication date: April 4, 2002Inventors: Gordon C. Taylor, Stewart M. Perlow, Arye Rosen, Aly E. Fathy, Sridhar Kanamaluru, Moniem Elsherbiny
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Publication number: 20010049180Abstract: A surface PIN (SPIN) device and a method of fabricating such a SPIN device. The SPIN device, when activated, confines carrier injection to a small volume near the surface of the device such that the device is sufficiently conductive to simulate a planar conductor. The SPIN device comprises a P+ region and an N+ region formed in an intrinsic (I) layer. The P+ and N+ regions are separated by a lateral length of intrinsic material of length L. The length L is approximately the carrier diffusion length. When DC bias is applied across the N+ and P+ regions carriers are injected into the intrinsic region at a density exceeding 1018 carriers per cubic cm. The intrinsic region is sufficiently thin to confine the carriers near the surface of the intrinsic region. As such, in the “on” state, the SPIN device simulates a conductive material. In the “off” state, the SPIN device is no longer conductive.Type: ApplicationFiled: March 20, 2001Publication date: December 6, 2001Inventors: Gordon C. Taylor, Arye Rosen, Aly E. Fathy, Pradyumna K. Swain, Stewart M. Perlow
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Patent number: 5929510Abstract: An electronic integrated circuit which includes at least one of RF, microwave, digital and analog components connected in a desired circuit. The integrated circuit includes a substrate of a conductive material having on a surface thereof a body of a dielectric material. The dielectric body is formed of a plurality of layers of the dielectric material bonded together. A plurality of strips of a conductive material are on the surfaces of the layers of the body to form RF, analog and digital components. Discrete electronic devices are mounted on the body and connected in the circuit. Vias of a conductive material extend through the various layers of the body to electrically connect the various strips of conductive material on the layers of the body.Type: GrantFiled: October 30, 1997Date of Patent: July 27, 1999Assignees: Sarnoff Corporation, Sharp Kabushiki KaishaInventors: Bernard Dov Geller, Aly E. Fathy, Stewart M. Perlow, Ashok Naryan Prabhu, Ellen Schwartz Tormey, Valerie Ann Pendrick, Israel Haim Kalish
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Patent number: 4636754Abstract: A four-port folded interdigitated coupler has two short conductive strips and three full length conductive strips disposed between the short strips. The full length strips are 1/4 wavelength long at a design frequency. The sum of the lengths of the short strips is 1/4 wavelength at that design frequency. The ends of the short strips remote from the ports are connected together and to the center one of the three full length strips by conductive jumpers. In one embodiment the two full length strips which are not connected to the short strips are connected by a conductive jumper at substantially the same longitudinal position as the jumpers which connect the ends of the two short strips. In this embodiment, the two short strips may have equal lengths or they may have unequal lengths. When their lengths are unequal, their jumpers and the associated jumper between the two outer full length strips are positioned off-center with respect to the longitudinal length of the full length strips.Type: GrantFiled: October 31, 1984Date of Patent: January 13, 1987Assignee: RCA CorporationInventors: Adolph Presser, Stewart M. Perlow
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Patent number: 4295107Abstract: An impedance transformation network includes a trifilar wire configuration in which each of three conductors, each having first and second respective ends, is equally spaced with respect to one another over a predetermined length. A substantial portion of the trifilar wire is surrounded by a ferrite material. The first and second ends of a first conductor are connected to first and second connection points of a first circuit. The first end of a second conductor is connected to a first connection point of a second circuit. The second end of the second conductor is connected to a second connection point of the second circuit. The second end of the second conductor and the first end of the third conductor are connected to a third connection point of the second circuit. Where the second connection point of the first circuit and the third connection point of the second circuit are signal ground points, the network serves as a balun.Type: GrantFiled: January 31, 1980Date of Patent: October 13, 1981Assignee: RCA CorporationInventor: Stewart M. Perlow