Patents by Inventor Stig Kallman

Stig Kallman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Selective partitioning of via structures in printed circuit boards
    Patent number: 10201098
    Abstract: The embodiments herein relate to an apparatus and medium for selective partitioning of a via in a printed circuit board as to produce an electrically isolating portion between two electrically conducting portions in said via. The apparatus and medium implement a step of prior to drilling the hole for the via, laminating plating resist layers to the printed circuit board at a distance from each other corresponding to a desired length of the electrically isolated portion of the via. After drilling, copper is added to selected portions of the interior of the via in two different processing steps followed by a step of removing undesired copper as to produce the electrically isolating portion.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: February 5, 2019
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
    Inventors: Stig Kallman, Tomas Bergsten
  • SELECTIVE PARTITIONING OF VIA STRUCTURES IN PRINTED CIRCUIT BOARDS
    Publication number: 20180310418
    Abstract: The embodiments herein relate to an apparatus and medium for selective partitioning of a via in a printed circuit board as to produce an electrically isolating portion between two electrically conducting portions in said via. The apparatus and medium implement a step of prior to drilling the hole for the via, laminating plating resist layers to the printed circuit board at a distance from each other corresponding to a desired length of the electrically isolated portion of the via. After drilling, copper is added to selected portions of the interior of the via in two different processing steps followed by a step of removing undesired copper as to produce the electrically isolating portion.
    Type: Application
    Filed: June 26, 2018
    Publication date: October 25, 2018
    Inventors: Stig KALLMAN, Tomas BERGSTEN
  • Selective partitioning of via structures in printed circuit boards
    Patent number: 10034391
    Abstract: The embodiments herein relate to a method for selective partitioning of a via in a printed circuit board as to produce an electrically isolating portion between two electrically conducting portions in said via. The method involves the step of prior to drilling the hole for the via, laminating plating resist layers to the printed circuit board at a distance from each other corresponding to a desired length of the electrically isolated portion of the via. After drilling, copper is added to selected portions of the interior of the via in two different processing steps followed by a step of removing undesired copper as to produce the electrically isolating portion.
    Type: Grant
    Filed: May 20, 2014
    Date of Patent: July 24, 2018
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Stig Kallman, Tomas Bergsten
  • SELECTIVE PARTITIONING OF VIA STRUCTURES IN PRINTED CIRCUIT BOARDS
    Publication number: 20160021762
    Abstract: The embodiments herein relate to a method for selective partitioning of a via in a printed circuit board as to produce an electrically isolating portion between two electrically conducting portions in said via. The method involves the step of prior to drilling the hole for the via, laminating plating resist layers to the printed circuit board at a distance from each other corresponding to a desired length of the electrically isolated portion of the via. After drilling, copper is added to selected portions of the interior of the via in two different processing steps followed by a step of removing undesired copper as to produce the electrically isolating portion.
    Type: Application
    Filed: May 20, 2014
    Publication date: January 21, 2016
    Inventors: Stig Kallman, Tomas Bergsten