Abstract: PDs that can be supplied through the LAN line are discriminated from PDs that cannot be so supplied as a function of the resistance of the supply line and of the voltage drop caused by nonlinear elements in series therewith. The values of these two parameters are estimated by applying two distinct voltages to the supply terminals of the LAN line and sensing the relative steady-state currents absorbed by the power supply line, and by processing voltage and current values for estimating the resistance of the line and the voltage drop caused by nonlinear elements connected in series therewith.

Abstract: An embodiment relates to a coplanar waveguide electronic device comprising a substrate whereon is mounted a signal ribbon and at least a ground plane. The signal ribbon comprises a plurality of signal lines of a same level of metallization electrically connected together, and the ground plane is made of an electrically conducting material and comprises a plurality of holes.

Abstract: A method for managing a non-volatile memory may include a first phase of writing data to a first bank of a memory plane of the non-volatile memory, and then a second phase of writing the same data to a second bank of the same memory plane of the non-volatile memory in the case of success of the first writing phase.

Abstract: An embodiment of a method for detecting permanent faults of an address decoder of an electronic memory device including a memory block formed by a plurality of memory cells, including the steps of: selecting an address, which identifies a selected set of memory cells; writing at the selected address a code word generated on the basis of an information word, of the selected address, and of an error-correction code; and then detecting an error within a word stored at the selected address. The method moreover includes the steps of: selecting a set of excitation addresses; writing a test word at the selected address, and then writing an excitation word at each excitation address; and next comparing the test word with a new word stored at the selected address.

Abstract: The present disclosure includes calibration circuitry for adjusting the bandwidth of at least one sub-converter of an interleaved analog to digital converter (ADC), the at least one sub-converter having an input switch coupled to an input line of the ADC, the calibration circuitry having a control circuit adapted to adjust a bulk voltage of a transistor forming the input switch.

Abstract: A method for defining an insulating area in a semiconductor substrate, including a step of forming of a bonding layer on the walls and the bottom of a trench defined in the substrate. A step of passivation of the apparent surface of said bonding layer, at least close to the surface of said semiconductor substrate.

Abstract: A radiation sensor of the type having a packaged radiation source and detector, which includes an isolator that blocks propagation within the package of radiation from the source to the detector, in order to improve signal to noise ratio of the sensor. The isolator is formed by appropriately formed surfaces of the package.

Abstract: A method for defining an insulator in a semiconductor substrate includes forming a trench in the substrate, forming in the trench an insulating material having its upper surface arranged above the surface of the substrate, and forming a diffusion barrier layer in a portion of the insulating material located above the surface of the semiconductor substrate. Such insulators can be used, for example, to insulate and delineate electronic components or portions of components formed in the substrate.

Abstract: A device and method for detecting a short circuit in an electrical component during a start-up routine. In an embodiment, a device may have a problematic display having a short circuit that may result in damage to other components of the device if the device were allowed to fully startup during a normal start-up routine. Thus, power supplied to the panel may be initiated in stages so as to monitor any current that may be flowing through the panel, which in turn, may be indicative of a short circuit in the panel. If enough “leakage” current is detected through the panel during this staged startup routine, then a short-circuit detection circuit may interrupt the startup routine and lock out the operation of the device until the detected short circuit in the panel can be addressed.

Abstract: A MOS transistor formed in an active area of a semiconductor substrate and having a polysilicon gate doped according to a first conductivity type, the gate including two lateral regions of the second conductivity type.

Abstract: An embodiment of a process for manufacturing an electronic device on a semiconductor body of a material with wide forbidden bandgap having a first conductivity type.

Abstract: An electronic system includes an insulating structural element with a coupling surface configured for coupling the electronic system with at least one further electronic system. The electronic system further includes at least one conducting contact element at least partially exposed on the coupling surface. Each conducting contact element has a soldering surface supporting reflow soldering of the conducting contact element with a corresponding further contact element of the further electronic system. In addition, each conducting contact element has at least one lateral surface protruding from the insulating structural element. The soldering surface of the conducting contact element includes at least one channel having an opened end at the protruding lateral surface, the channel configured to facilitate dispersion of waste gas produced during reflow soldering.

Abstract: A package includes a substrate with an attached emitting IC chip and receiving IC chip. The emitting IC chip includes an optical emitter, and the receiving IC chip includes a main optical sensor and a secondary optical sensor. A case is provided with a bottom portion and a peripheral wall portion to cover the IC chips, wherein the edge of the peripheral wall portion is mounted to the substrate. The bottom portion of the case includes a main opening above the main optical sensor and a secondary opening above the optical emitter. An opaque material is interposed between the case and the receiving IC chip to isolate the main optical sensor from the secondary optical sensor and delimiting a chamber containing the secondary optical sensor and the optical emitter. The chamber is optically isolated from the main optical sensor and main opening, and may be filled with a transparent material.

Abstract: A method for performing a modification of the color saturation of at least one pixel of an image involving: determining, based on pixel values of a first pixel, at least one of a color saturation value, luminance value and hue value corresponding to said first pixel; determining, based on said at least one value, a saturation factor; and modifying the color saturation level of said first pixel based on said saturation factor.

Abstract: A microelectromechanical sensor includes a supporting structure and a sensing mass, which is elastically coupled to the supporting structure, is movable with respect thereto with one degree of freedom in response to movements according to an axis and is coupled to the supporting structure through a capacitive coupling. A sensing device senses, on terminals of the capacitive coupling, transduction signals indicative of displacements of the first sensing mass according to the degree of freedom. The sensing device includes at least one first reading chain, having first operative parameters, one second reading chain, having second operative parameters different from the first operative parameters, and one selective electrical connection structure that couples the first reading chain and the second reading chain to the first terminals.

Abstract: A packaged MEMS device, wherein at least two support structures are stacked on each other and are formed both by a support layer and a wall layer coupled to each other and delimiting a respective chamber. The chamber of the first support structure is upwardly delimited by the support layer of the second support structure. A first and a second dice are accommodated in a respective chamber, carried by the respective support layer of the first support structure. The support layer of the second support structure has a through hole allowing wire connections to directly couple the first and the second dice. A lid substrate, coupled to the second support structure, closes the chamber of the second support structure.

Abstract: A microelectromechanical gyroscope having a supporting structure; a mass capacitively coupled to the supporting structure and movable with a first degree of freedom and a second degree of freedom, in response to rotations of the supporting structure about an axis; driving components, for keeping the mass in oscillation according to the first degree of freedom; a read interface for detecting transduction signals indicating the capacitive coupling between the mass and the supporting structure; and capacitive compensation modules for modifying the capacitive coupling between the mass and the supporting structure. Calibration components detect systematic errors from the transduction signals and modify the capacitive compensation modules as a function of the transduction signals so as to attenuate the systematic errors.

Abstract: An integrated circuit may include a region containing a thermoelectric material and be configured to be subjected to a temperature gradient resulting from a flow of an electric current in a part of the integrated circuit during its operation, and an electrically conducting output coupled to the region for delivering the electrical energy produced by thermoelectric material.

Abstract: The disclosure relates to a countermeasure method in an electronic microcircuit, comprising successive process phases executed by a circuit of the microcircuit, and adjusting a power supply voltage between power supply and ground terminals of the circuit, as a function of a random value generated for the process phase, at each process phase executed by the circuit.