Abstract: An integrated circuit package and a manufacturing method thereof are provided. The integrated circuit package can include a substrate provided with a circuit pattern, a first set of bonding fingers and a second set of bonding fingers, a first chip stack mounted on the substrate and having a plurality of first semiconductor chips stacked in a first direction in a stepped manner, each of the first semiconductor chips being provided with a first bonding pad at an end thereof on one side, a second chip stack mounted on the first chip stack and having a plurality of second semiconductor chips stacked in a second direction opposite to the first direction in a stepped manner.

Abstract: A wafer-level package and a method of manufacturing the same. The wafer-level package includes a first semiconductor chip on an upper side of which an active surface facing downward is disposed, a redistribution formed on the active surface of the first semiconductor chip, a second semiconductor chip disposed on the redistribution using a flip-chip bonding (FCP) technique, a copper (Cu) post and a first solder ball sequentially disposed on the redistribution, a molding member formed on the active surface of the first semiconductor chip to expose a bottom surface of the first solder ball and an inactive surface of the second semiconductor chip, and a second solder ball disposed on the first solder ball and electrically connected to an external apparatus.

Abstract: A method of manufacturing a semiconductor package having no chip pad includes preparing a polyimide tape on which an adhesive layer is arranged; forming lead members on the adhesive layer so as to form a plurality of semiconductor packages in a matrix form; attaching the polyimide tape to a carrier; performing wire bonding to mount semiconductor chips on the polyimide tape and connect the lead members and the semiconductor chips; forming an encapsulation member to encapsulate the semiconductor chips, the lead members, and wires; detaching the encapsulation member from the carrier and the polyimide tape; forming conductive layers each on a surface of the lead member exposed through a surface of the encapsulation member; and performing a singulation process on the encapsulation member with the conductive layers formed thereon to define unit semiconductor packages.

Abstract: A semiconductor package including: a lead frame including a chip attachment unit and a lead unit; a semiconductor chip that is mounted on the chip attachment unit of the lead frame; a wire that electrically connects the semiconductor chip to the lead unit; an insulation layer formed in the lead frame under the chip attachment unit; and an encapsulant that seals an upper portion of the lead frame, the semiconductor chip, and the wire, wherein the lead unit does not protrude to the outside of the encapsulant.