Patents by Inventor Stuart A. Ross

Stuart A. Ross has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090008787
    Abstract: A method of forming a contact structure and a contact structure so formed is described. The structure contacts an underlying layer of a semiconductor junction, wherein the junction comprises the underlying layer of a semiconductor material and is separated from an overlying layer of semiconductor material by creating an undercut region to shade subsequent metal formation. Various steps are performed using inkjet printing techniques.
    Type: Application
    Filed: May 22, 2008
    Publication date: January 8, 2009
    Inventors: Stuart Ross WENHAM, Ly Mai, Nicole Bianca Kuepper, Budi Tjahjono
  • Patent number: 6821875
    Abstract: In a method for forming a contact on semiconductor surface, a crystalline silicon surface is first oxidized, following which an aluminium layer is deposited onto the oxide layer. A layer of amorphous silicon is then deposited onto the aluminium layer. The structure is then heated to a temperature below the aluminium/silicon eutectic temperature to locally reduce the oxide layer in regions where the quality/density of the oxide layer is lower. Simultaneously, the amorphous silicon penetrates into the aluminium layer, in which it has a high mobility. With continued heating, the aluminium penetrates completely through the oxide layer in localized regions, exposing the crystalline silicon surface. The exposed silicon surface provides a sight for nucleating epitaxial growth, which occurs rapidly as silicon within the aluminium continuously feeds the solid phase epitaxial growth process.
    Type: Grant
    Filed: November 5, 2002
    Date of Patent: November 23, 2004
    Assignee: Unisearch Limited
    Inventors: Stuart Ross Wenham, Linda Mary Koschier
  • Publication number: 20030143827
    Abstract: In a method for forming a contact on semiconductor surface, a crystalline silicon surface is first oxidized, following which an aluminium layer is deposited onto the oxide layer. A layer of amorphous silicon is then deposited onto the aluminium layer. The structure is then heated to a temperature below the aluminium/silicon eutectic temperature to locally reduce the oxide layer in regions where the quality/density of the oxide layer is lower. Simultaneously, the amorphous silicon penetrates into the aluminium layer, in which it has a high mobility. With continued heating, the aluminium penetrates completely through the oxide layer in localized regions, exposing the crystalline silicon surface. The exposed silicon surface provides a sight for nucleating epitaxial growth, which occurs rapidly as silicon within the aluminium continuously feeds the solid phase epitaxial growth process.
    Type: Application
    Filed: November 5, 2002
    Publication date: July 31, 2003
    Inventors: Stuart Ross Wenham, Linda Koschier
  • Patent number: 6551903
    Abstract: A thin film photovoltaic devices is described, having a glass substrate 11 over which is formed a thin film silicon device having an n++ layer 12, a p layer 13 and a dielectric layer 14 (typically silicon oxide or silicon nitride). To create a connection through the p layer 13 to the underlying n++ layer 12, a column of semi-conductor material is heated, the column passing through the various doped layers and the material in the column being heated or melted to allow migration of dopant between layer of the device in the region of the column.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: April 22, 2003
    Assignee: Pacific Solar Pty. Limited
    Inventors: Zhengrong Shi, Paul Alan Basore, Stuart Ross Wenham, Guangchun Zhang, Shijun Cai
  • Patent number: 6538195
    Abstract: A thin film silicon solar cell is provided on a glass substrate, the glass having a textured surface, including larger scale surface features and smaller scale surface features. Over the surface is deposited a thin barrier layer which also serves as an anti-reflection coating. The barrier layer may be a silicon nitride layer for example and will be 70 nm±20% in order to best achieve its anti-reflection function. Over the barrier layer is formed an essentially conformal silicon film having a thickness which is less than the dimensions of the larger scale features of the glass surface and of a similar dimension to the smaller scale features of the glass surface.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: March 25, 2003
    Assignee: Pacific Solar Pty Limited
    Inventors: Zhengrong Shi, Stuart Ross Wenham, Martin Andrew Green, Paul Alan Basore, Jing Jia Ji
  • Patent number: 6429037
    Abstract: A method of making contacts on solar cells is disclosed. The front surface (41) of a substrate (11) is coated with a dielectric or surface masking layer or layers (12) that contains dopants of the opposite polarity to those used in the surface of the substrate material (11). The dielectric layers or layers (12) not only acts as a diffusion source for forming the emitter for the underlying substrate (11) when heat treated, but also acts as a metallization mask during the subsequent electroless plating with solutions such as nickel and copper. The mask may be formed by laser scribing (14) which melts the layer or layers (12), thereby more heavily doping and exposing zones (15) where metallization is required.
    Type: Grant
    Filed: December 20, 2000
    Date of Patent: August 6, 2002
    Assignee: Unisearch Limited
    Inventors: Stuart Ross Wenham, Martin Andrew Green
  • Patent number: 6210991
    Abstract: The method is provided for contact formation in semiconductor devices. The method involves forming an insulating layer over an active region to be contacted to, forming holes or openings in the insulating layer to expose the active region and forming an aluminium layer over the insulating layer. A source of non-crystalline semiconductor material or damaged crystalline material is located in contact with the aluminium layer such that the non-crystalline or damaged crystalline material is dissolved in the aluminium layer and redeposited on the surface of the semiconductor material to be contacted to. The semiconductor material is deposited by solid phase epitaxial growth and carries with it, aluminium atoms which leave the semiconductor material as heavily doped p-type material.
    Type: Grant
    Filed: December 17, 1999
    Date of Patent: April 3, 2001
    Assignee: Unisearch Limited
    Inventors: Stuart Ross Wenham, Martin Andrew Green
  • Patent number: 6162658
    Abstract: The present invention makes use of geometry of grooves formed in a substrate, to allow a dielectric layer to be deposited with some regions of the grooves having a substantially thinner layer deposited than top surfaces of the substrate. These regions of reduced thickness dielectric within the grooves are then prematurely etched by an appropriate chemical, or other, etchant capable of controllably etching away the dielectric layer, with the result that in these regions the silicon surface can be exposed and plated by a metallization while the top surface remains protected by the dielectric material. The remaining dielectric material can optionally be required to act as an anti-reflective coating. The invention is applicable in making buried contact solar cells.
    Type: Grant
    Filed: April 17, 1998
    Date of Patent: December 19, 2000
    Assignee: Unisearch Limited
    Inventors: Martin Andrew Green, Stuart Ross Wenham, Christiana B Honsberg
  • Patent number: 5990415
    Abstract: A multilayer solar cell with bypass diodes includes a stack of alternating p and n type semiconductor layers 10, 11, 12, 13, 14 arranged to form a plurality of rectifying photovoltaic junctions 15, 16, 17, 18. Contact is made to underlying layers by way of a buried contact structure comprising grooves extending down through all of the active layers, the walls of each groove being doped 33, 34 with n-or p-type impurities depending upon the layers to which the respective contact is to be connected and the grooves being filled with metal contact material 31, 32. One or more bypass diodes are provided by increasing the doping levels on either side 10, 13 of one or more portions of the junctions 16 of the cell such that quantum mechanical tunnelling provides a reverse bias characteristic whereby conduction occurs under predetermined reverse bias conditions. Ideally, the doping levels in the bypass diodes is 10.sup.18 atoms/cm.sup.3 or greater and the junction area is small.
    Type: Grant
    Filed: May 29, 1997
    Date of Patent: November 23, 1999
    Assignee: Pacific Solar Pty Ltd
    Inventors: Martin Andrew Green, Stuart Ross Wenham
  • Patent number: 5942050
    Abstract: A semiconductor structure and method of forming the structure, where a supporting substrate or superstrate provides the mechanical strength to support overlying thin active regions. The thin dielectric layer deposited over the substrate or superstrate serves to isolate the deposited layers from the substrate from optical, metallurgical and/or chemical perspectives. A seeding layer is then deposited, the seeding layer being of n-type silicon with appropriate treatments to give the desired large grain size. This layer may be crystallized as it is deposited, or may be deposited in amorphous form and then crystallized with further processing. A stack of alternating polarity layers of amorphous silicon or silicon alloy incorporating n-type or p-type dopants in the alternating layers is then deposited over the seeding layer. Solid phase crystallization is then performed to give the desired grain size of 3 .mu.m or larger which can be achieved by extended heating of the layers at low temperature.
    Type: Grant
    Filed: May 29, 1997
    Date of Patent: August 24, 1999
    Assignee: Pacific Solar Pty Ltd.
    Inventors: Martin Andrew Green, Stuart Ross Wenham, Zhengrong Shi
  • Patent number: 5797998
    Abstract: A multilayer solar cell structure includes a stack of alternating p-type and n-type semiconductor layers arranged to form a plurality of rectifying photovoltaic junctions. Low-cost cells are manufactured from low-quality material which is optimized by employing very high doping levels in thin layers. Typically, the doping levels are greater than 10.sup.17 atoms/cm.sup.3, and the thickness of the layers is related to carrier diffusion length in thickness. Contact is made to underlying layers by way of a buried contact structure comprising grooves extending down through all of the active layers, the walls of each groove being doped with n- or p-type impurities depending upon the layers to which the respective contact is to be connected and the grooves being filled or partly filled with metal contact material.
    Type: Grant
    Filed: August 28, 1996
    Date of Patent: August 25, 1998
    Assignee: Pacific Solar Pty. Limited
    Inventors: Stuart Ross Wenham, Martin Andrew Green
  • Patent number: 5678939
    Abstract: An improved writing instrument preferably made of a clear sheet plastic material and consisting of two principal parts, namely an outer border portion which is preferably about the size of a credit card and an inner pen portion that holds an ink cartridge with a pen point projecting from the end of the pen portion. For storage and carrying, the two parts lie in the same plane, forming a card-like shape. For writing, the pen portion pivots to a comfortable angle on axle pins inserted in the card portion. The user holds the outer card portion and/or the angled pen portion while writing. Both portions are preferably of the same thickness which may be about 1/8 inch to 1/4 inch, the pen portion being approximately 3/4 to 1 inch wide and about 1 to 3 inches long, depending upon the overall size of the writing instrument.
    Type: Grant
    Filed: July 17, 1995
    Date of Patent: October 21, 1997
    Inventor: Stuart A. Ross
  • Patent number: 5534914
    Abstract: A videoconferencing network for digital computer workstations that operate on a local area network (LAN) to exchange data. The network includes a signalling local area network (A-LAN), connected to a first port of a plurality of workstations, for transmitting and receiving data signals between selected ones of the workstations and a broadband local area network (B-LAN) connected to a second port of the plurality of workstations, for transmitting and receiving television signals between selected ones of these workstations. Each television signal is transmitted at a selected frequency channel so that no two transmissions interfere. A software program, stored in and operable on the computer of each workstation, generates and receives data messages, transmitted via the A-LAN, to and from the computer of another workstation, respectively.
    Type: Grant
    Filed: September 22, 1994
    Date of Patent: July 9, 1996
    Assignee: Target Technologies, Inc.
    Inventors: Daniel P. Flohr, Stuart Ross