Abstract: A mm wave radio communication mesh network comprises a wireless node apparatus comprising a plurality of wireless modems (103) and a configuration controller (307) arranged to perform a node configuration arranged to configure the wireless modems (103) as access point wireless modems or non-access point wireless modems. The configuration controller (307) controls a set of wireless modems to scan for access point beacons and determines a first wireless modem that has detected an access point beacon from a first target access point wireless modem. It then configures the first wireless modem as a non-access point wireless modem and controls it to connect to the first target access point modem. If the connection is successful, the configuration controller (307) proceeds to configure another wireless modem as an access point wireless modem.

Abstract: An integrated circuit is operable to execute boot loader code and a boot code from external memory. To provide security so that the CPU does not execute malicious codes, the circuit resets in a restricted mode in which only certain functional units may be connected. In the restricted mode the CPU is only able to fetch boot code from an external memory for transfer to an internal memory. A hash function operates on the fetched boot code to determine whether it is authentic and, if it is determined that the code is authentic the circuit is reset to an unrestricted mode to continue executing from the boot code now stored in the internal memory. Further security is provided by a watchdog timer function which resets the circuit if the boot code is not determined to be authentic within a threshold period of time.

Abstract: An integrated circuit of the type comprises a plurality of units that may act as initiators and targets. At least some of the units are for a first purpose such as a cable modem function and others are for a second purpose such as television data processing. The units are connected together by a interconnect comprising a number of nodes. One of the nodes is configurable such that requests made from initiator units on one side of the node to target units on the other side of the node are not sent to the target units. The units for the first purpose are arranged on the opposite side of the node from those of the second purpose, so that the circuit is effectively configurable into two separate logical partitions, one partition for television data processing and the other partition for cable modem functions.

Abstract: A system is provided in which a first circuit is protected by security features provided by a second circuit. The first circuit comprises a processor which retrieves content from a memory. Initially, the contents of the memory are authenticated using security features of the second circuit to check that the processor is accessing authenticated content. To maintain security during use, the second circuit checks that the processor is accessing content from valid regions of the memory, being those that have been authenticated, and re-checks the authenticity of the content of the valid regions of memory. The combination of checking that the processor is accessing from valid regions of the memory and authenticating the content stored in the valid regions maximizes the security of the system. If any of the checking or authentication steps fail then operation of the system is impaired. The first circuit is thus protected by security features provided by the second circuit.

Abstract: A system is provided in which a first circuit is protected by security features provided by a second circuit. The first circuit comprises a processor which retrieves content from a memory. Initially, the contents of the memory are authenticated using security features of the second circuit to check that the processor is accessing authenticated content. To maintain security during use, the second circuit checks that the processor is accessing content from valid regions of the memory, being those that have been authenticated, and re-checks the authenticity of the content of the valid regions of memory. The combination of checking that the processor is accessing from valid regions of the memory and authenticating the content stored in the valid regions maximizes the security of the system. If any of the checking or authentication steps fail then operation of the system is impaired. The first circuit is thus protected by security features provided by the second circuit.