Abstract: A method and apparatus for automated electrical validation to detect and analyze worst case SSO conditions are described. In one embodiment, the method includes driving a plurality of switching I/O patterns having a predetermined frequency content to achieve a plurality of varying stress levels within an I/O subsystem selected for electrical validation. When a problematic I/O pattern is detected, the problematic I/O pattern is driven through the I/O subsystem in order to identify problematic behavior within the I/O subsystem. Once the problematic behavior is resolved, the method may be repeated while margining an input reference voltage or system platform timing until electrical validation of the selected I/O subsystem is complete.