Patents by Inventor Stuart Bowden
Stuart Bowden has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12261237Abstract: Photovoltaic devices with very high breakdown voltages are described herein. Typical commercial silicon photovoltaic devices have breakdown voltages below 50-100 volts (V). Even though such devices have bypass diodes to prevent photovoltaic cells from going into breakdown, the bypass diodes have high failure rates, leading to unreliable devices. A high-efficiency silicon photovoltaic cell is provided with very high breakdown voltages. By combining a device architecture with very low surface recombination and silicon wafers with high bulk resistivity (above 10 ohms centimeter (?-cm)), embodiments described herein achieve breakdown voltages close to 1000 V. These photovoltaic cells with high breakdown voltages improve the reliability of photovoltaic devices, while reducing their design complexity and cost.Type: GrantFiled: May 2, 2022Date of Patent: March 25, 2025Assignee: Arizona Board of Regents on behalf of Arizona State UniversityInventors: Andre Filipe Rodrigues Augusto, Apoorva Srinivasa, Stuart Bowden
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Publication number: 20220359778Abstract: Photovoltaic devices with very high breakdown voltages are described herein. Typical commercial silicon photovoltaic devices have breakdown voltages below 50-100 volts (V). Even though such devices have bypass diodes to prevent photovoltaic cells from going into breakdown, the bypass diodes have high failure rates, leading to unreliable devices. A high-efficiency silicon photovoltaic cell is provided with very high breakdown voltages. By combining a device architecture with very low surface recombination and silicon wafers with high bulk resistivity (above 10 ohms centimeter (?-cm)), embodiments described herein achieve breakdown voltages close to 1000 V. These photovoltaic cells with high breakdown voltages improve the reliability of photovoltaic devices, while reducing their design complexity and cost.Type: ApplicationFiled: May 2, 2022Publication date: November 10, 2022Applicant: Arizona Board of Regents on behalf of Arizona State UniversityInventors: Andre Filipe Rodrigues Augusto, Apoorva Srinivasa, Stuart Bowden
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Publication number: 20220262972Abstract: Various embodiments of systems and methods for a solar module which concentrates light onto a solar cell while allowing diffuse light to pass to below crops are disclosed.Type: ApplicationFiled: July 13, 2020Publication date: August 18, 2022Inventors: Christiana Honsberg, Stuart Bowden
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Publication number: 20220248648Abstract: A fisheries bycatch reduction device is disclosed which may be coupled to or positioned proximate to a net. The device includes a housing and an electrical assembly positioned within the housing. The bycatch reduction device uses a power management strategy to control illumination and charging to create a hassle free, readily deployable substitute for traditional buoys and reduces the unintended catch of non-desired marine life.Type: ApplicationFiled: July 9, 2020Publication date: August 11, 2022Inventors: Mark Bailly, Jesse Senko, Jennifer Blain Christen, Michael Goryll, Stuart Bowden, Christopher Lue Sang
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Publication number: 20210376788Abstract: A self-powered voltage ramp for photovoltaic module testing provides a robust circuit for the measurement of current-voltage curves. A resistor and capacitor form a timer circuit to control a gate of a power transistor and give a linear voltage sweep from a short circuit (e.g., zero volts) to an open circuit voltage VOC. The sweep rate can be varied by adjusting the resistor value. Additional enhancements prevent oscillations within the circuit, maintain a voltage of the power transistor within its design specifications, and allow for the measurement of single cell mini-modules. Additional circuitry can characterize the photovoltaic module based on the measurement data. Measurement accuracy is within 1% of a laboratory supply for measurements of maximum power, short circuit current, and open circuit voltage.Type: ApplicationFiled: August 27, 2019Publication date: December 2, 2021Applicant: Arizona Board of Regents on behalf of Arizona State UniversityInventors: Stuart Bowden, Antony Aguilar
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Patent number: 10256362Abstract: An apparatus includes a flexible silicon (Si) substrate, such as a crystalline n-type substrate, and a heterostructure structure formed on the silicon substrate. The heterojunction structure includes a first layered structured deposited on a first side of the silicon substrate. The first layered structured includes a first amorphous intrinsic silicon layer, an amorphous n-type or p-type silicon layer, and a transparent conductive layer. The second layered structure includes a second amorphous intrinsic silicon layer, an amorphous p-type or n-type silicon layer, and a transparent conductive layer. The heterostructure structure is configured to operate as a photovoltaic cell and an infrared light emitting diode.Type: GrantFiled: July 31, 2017Date of Patent: April 9, 2019Assignee: Arizona Board of Regents on Behalf of Arizona State UniversityInventors: Andre Filipe Rodrigues Augusto, Stanislau Herasimenka, Stuart Bowden
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Publication number: 20180033905Abstract: An apparatus includes a flexible silicon (Si) substrate, such as a crystalline n-type substrate, and a heterostructure structure formed on the silicon substrate. The heterojunction structure includes a first layered structured deposited on a first side of the silicon substrate. The first layered structured includes a first amorphous intrinsic silicon layer, an amorphous n-type or p-type silicon layer, and a transparent conductive layer. The second layered structure includes a second amorphous intrinsic silicon layer, an amorphous p-type or n-type silicon layer, and a transparent conductive layer. The heterostructure structure is configured to operate as a photovoltaic cell and an infrared light emitting diode.Type: ApplicationFiled: July 31, 2017Publication date: February 1, 2018Inventors: Andre Filipe Rodrigues Augusto, Stanislau Herasimenka, Stuart Bowden
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Patent number: 9726710Abstract: Methods and systems for prediction of fill factor in heterojunction solar cells through lifetime spectroscopy are provided. In accordance with some embodiments, methods for categorizing fill factor in a solar cell are provided, the methods comprising: determining lifetime values of the solar cell at different minority carrier concentrations; determining a lifetime curve shape for the solar cell based on the determined lifetime values; and categorizing the fill factor of the solar cell based on the determined lifetime curve shape using a hardware processor.Type: GrantFiled: November 21, 2013Date of Patent: August 8, 2017Assignee: Arizona Board of Regents, a body corporate of the State of Arizona, acting for and on behalf of Arizona State UniversityInventors: Kunal Ghosh, Stuart Bowden
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Publication number: 20170098723Abstract: Method for controlling a potential-induced degradation (PID) of a PV module. Embodiment includes modifying surface conductivity of the glass-cover of the PV module at least in proximity to an edge of the supporting frame to interrupt an electrically conductive path formed, between the supporting frame and the PV cell through the glass-cover, by ambient conditions. In a related embodiment, the electrically-insulating material is disposed between the glass-cover and the PV cell and. optionally, is additionally embedded in an encapsulating material in which the PV cell is embedded. Related embodiment includes assembling a PV module with a layer of electrically-insulating material configured to prevent the formation of such conductive path.Type: ApplicationFiled: June 10, 2015Publication date: April 6, 2017Inventors: JAEWON OH, Sai Tatapudi, Govindasamy Tamizhmani, Stuart Bowden
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Publication number: 20140272198Abstract: Systems, methods, and media for forming metallization for solar cells are provided. In some embodiments, a system for forming metallization on a substrate is provided, the system comprising: a first laser; a second laser; and a hardware processor programmed to: rotate a target at a predetermined speed; cause the first laser to emit a laser pulse that causes a material to be ablated from the rotating target toward a surface of a substrate; causing a continuous laser beam emitted by the second laser to pass through the ablated material and heat clusters in ablated material prior to the clusters landing on the surface of the substrate; and causing the continuous laser beam to heat deposited clusters from the plume of ablated material that have landed on the surface of the substrate to form a metallization line.Type: ApplicationFiled: March 17, 2014Publication date: September 18, 2014Inventors: Stuart Bowden, Mikhael Reginevich, Stanislau Herasimenka
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Publication number: 20140137933Abstract: Devices comprising: an absorbing medium (AM) having first and second sides; a first membrane layer (ML) having first and second sides, wherein the first side of the first ML contacts the first side of the AM; a second ML having first and second sides, wherein the first side of the second ML contacts the second side of the AM; a first contact in contact with the second side of the first ML; and a second contact in contact with the second side of the second ML, wherein a first band alignment mismatch between the first contact and the AM causes a first surface of the AM on the first side of the AM to be in inversion, and wherein a second band alignment mismatch between the second contact and the AM causes a second surface of the AM on the second side of the AM to be under accumulation.Type: ApplicationFiled: November 21, 2013Publication date: May 22, 2014Applicant: Arizona Board of Regents, a body corporate of the State of Arizona, acting for and on behalf of ArizInventors: Kunal Ghosh, Stuart Bowden, Christiana Honsberg
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Publication number: 20140142882Abstract: Methods and systems for prediction of fill factor in heterojunction solar cells through lifetime spectroscopy are provided. In accordance with some embodiments, methods for categorizing fill factor in a solar cell are provided, the methods comprising: determining lifetime values of the solar cell at different minority carrier concentrations; determining a lifetime curve shape for the solar cell based on the determined lifetime values; and categorizing the fill factor of the solar cell based on the determined lifetime curve shape using a hardware processor.Type: ApplicationFiled: November 21, 2013Publication date: May 22, 2014Applicants: Arizona StInventors: Kunal Ghosh, Stuart Bowden
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Publication number: 20130344684Abstract: In accordance with some embodiments, a method for using SSLE to create one or more wafers from a material is provided, the method comprising: using a laser light beam to etch pits in the material to create one or more layers of etch pits in a subsurface of the material; and dividing the material into one or more individual wafers with an etch. In accordance with some embodiments, a system for using SSLE to create one or more wafers from a material is provided, the system comprising: a controller for controlling the position of a focal point of a laser light beam with respect to the material and causing an irradiation of the laser light beam at a plurality of focal points; and an etch for splitting the material into the one or more wafers based on the plurality of focal points.Type: ApplicationFiled: June 20, 2013Publication date: December 26, 2013Inventor: Stuart Bowden