Abstract: A package is disclosed. In one example, the package comprises a carrier, a semiconductor chip having a first connection area at which the semiconductor chip is mounted at a first vertical level on or above the carrier, and a connection body. The semiconductor chip is bent to thereby be connected at a second connection area of the semiconductor chip at a second vertical level, being different from the first vertical level, with the connection body.

Abstract: A semiconductor device includes a conductive frame comprising a die attach surface that is substantially planar, a semiconductor die comprising a first load on a rear surface and a second terminal disposed on a main surface, a first conductive contact structure disposed on the die attach surface, and a second conductive contact structure on the main surface. The first conductive contact structure vertically extends past a plane of the main surface of the semiconductor die. The first conductive contact structure is electrically isolated from the main surface of the semiconductor die by an electrical isolation structure. An upper surface of the electrical isolation structure is below the main surface of the semiconductor die.

Abstract: A semiconductor device includes a conductive frame comprising a die attach surface that is substantially planar, a semiconductor die comprising a first load on a rear surface and a second terminal disposed on a main surface, a first conductive contact structure disposed on the die attach surface, and a second conductive contact structure on the main surface. The first conductive contact structure vertically extends past a plane of the main surface of the semiconductor die. The first conductive contact structure is electrically isolated from the main surface of the semiconductor die by an electrical isolation structure. An upper surface of the electrical isolation structure is below the main surface of the semiconductor die.

Abstract: A method which comprises applying a common pressing force operative to interconnect an electronic chip with a connector body by an interconnect structure, and to contribute to a forming of the connector body.

Abstract: A method which comprises applying a common pressing force operative to interconnect an electronic chip with a connector body by an interconnect structure, and to contribute to a forming of the connector body.

Abstract: This invention relates to methods of making a compound of formula (I) and intermediates for same the compounds of formula (I) being useful for treating cardiovascular and inflammatory diseases such as atherosclerosis.

Abstract: This invention relates to methods of making a compound of formula (I) and intermediates for same the compounds of formula (I) being useful for treating cardiovascular and inflammatory diseases such as atherosclerosis.

Abstract: Some exemplary embodiments of a multi-chip semiconductor package utilizing a semiconductor substrate and related method for making such a semiconductor package have been disclosed. One exemplary embodiment comprises a first semiconductor device including, on a surface thereof, a first patterned dielectric layer, a conductive redistribution layer, a second patterned dielectric layer, and a second semiconductor device. The conductive redistribution layer connects to a first and a second patterned conductive attach material for connecting the first and second semiconductor devices to provide coplanar electrical connections for mounting on a printed circuit board. In one embodiment, the first semiconductor device is a diode having anode and cathode contacts on an upper surface thereof, and the second semiconductor device is an IGBT.

Abstract: Some exemplary embodiments of a multi-chip semiconductor package utilizing a semiconductor substrate and related method for making such a semiconductor package have been disclosed. One exemplary embodiment comprises a first semiconductor device including, on a surface thereof, a first patterned dielectric layer, a conductive redistribution layer, a second patterned dielectric layer, and a second semiconductor device. The conductive redistribution layer connects to a first and a second patterned conductive attach material for connecting the first and second semiconductor devices to provide coplanar electrical connections for mounting on a printed circuit board. In one embodiment, the first semiconductor device is a diode having anode and cathode contacts on an upper surface thereof, and the second semiconductor device is an IGBT.

Abstract: Some exemplary embodiments of a multi-chip semiconductor package utilizing a semiconductor substrate and related method for making such a semiconductor package have been disclosed. One exemplary embodiment comprises a first semiconductor device including, on a surface thereof, a first patterned dielectric layer, a conductive redistribution layer, a second patterned dielectric layer, and a second semiconductor device. The conductive redistribution layer connects to a first and a second patterned conductive attach material for connecting the first and second semiconductor devices to provide coplanar electrical connections for mounting on a printed circuit board. In one embodiment, the first semiconductor device is a diode having anode and cathode contacts on an upper surface thereof, and the second semiconductor device is an IGBT.

Abstract: This invention relates to methods of making a compound of formula (I) and intermediates for same the compounds of formula (I) being useful for treating cardiovascular and inflammatory diseases such as atherosclerosis.

Abstract: Some exemplary embodiments of a multi-chip semiconductor package utilizing a semiconductor substrate and related method for making such a semiconductor package have been disclosed. One exemplary embodiment comprises a first semiconductor device including, on a surface thereof, a first patterned dielectric layer, a conductive redistribution layer, a second patterned dielectric layer, and a second semiconductor device. The conductive redistribution layer connects to a first and a second patterned conductive attach material for connecting the first and second semiconductor devices to provide coplanar electrical connections for mounting on a printed circuit board. In one embodiment, the first semiconductor device is a diode having anode and cathode contacts on an upper surface thereof, and the second semiconductor device is an IGBT.