Patents by Inventor Stuart David Simpson-Biles

Stuart David Simpson-Biles has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dynamic caching policies for processing-in-memory
    Patent number: 12455826
    Abstract: A computing device includes a memory having one or more processing-in-memory units, and a host processor that includes one or more caches. The host processor receives a workload that accesses a page of the memory. Further, the host processor dynamically assigns different modes of operation to the page of the memory during different phases of execution of the workload. The different modes are assigned based on whether the workload is to be executed by the host processor, the one or more processing-in-memory units, or the host processor and the one or more processing-in-memory units during the different phases of execution. The host processor processes requests of the workload that access the page of the memory in accordance with the different modes of operation during the different phases of execution. Notably, the different modes of operation specify different caching policies for the page of the memory.
    Type: Grant
    Filed: March 29, 2024
    Date of Patent: October 28, 2025
    Assignee: Advanced Micro Devices, Inc.
    Inventors: David Andrew Werner, Stuart David Simpson-Biles, Travis Henry Boraten
  • Dynamic Caching Policies for Processing-in-Memory
    Publication number: 20250307147
    Abstract: A computing device includes a memory having one or more processing-in-memory units, and a host processor that includes one or more caches. The host processor receives a workload that accesses a page of the memory. Further, the host processor dynamically assigns different modes of operation to the page of the memory during different phases of execution of the workload. The different modes are assigned based on whether the workload is to be executed by the host processor, the one or more processing-in-memory units, or the host processor and the one or more processing-in-memory units during the different phases of execution. The host processor processes requests of the workload that access the page of the memory in accordance with the different modes of operation during the different phases of execution. Notably, the different modes of operation specify different caching policies for the page of the memory.
    Type: Application
    Filed: March 29, 2024
    Publication date: October 2, 2025
    Applicant: Advanced Micro Devices, Inc.
    Inventors: David Andrew Werner, Stuart David Simpson-Biles, Travis Henry Boraten