Patents by Inventor Stuart Hayes

Stuart Hayes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080011506
    Abstract: A method of reducing noise induced from reference plane currents is disclosed. The method includes routing a first path for an electrical trace on a circuit board such that the first path references a voltage plane. The method further includes routing a second path for the electrical trace on the circuit board such that the second path references a ground plane whereby the second path is substantially similar to the first path. The method further includes electrically coupling the first path to the second path at each of the ends of the first and second paths such that noise induced into the electrical trace is reduced.
    Type: Application
    Filed: July 16, 2007
    Publication date: January 17, 2008
    Applicant: DELL PRODUCTS L.P.
    Inventors: Stuart Hayes, Shane Chiasson
  • Patent number: 6978333
    Abstract: A method and system are provided for reducing impedance discontinuities which occur when two expansion connectors are located very close to one another on a bus in an information handling system. An interconnect is situated between the two expansion connectors and exhibits an impedance which is selected to be sufficiently low to compensate for the amount by which the impedance of the expansion bus connectors exceeds the impedance of the expansion bus connected thereto.
    Type: Grant
    Filed: February 1, 2005
    Date of Patent: December 20, 2005
    Assignee: Dell Products L.P.
    Inventors: Ian Timmins, Michael Leins, Stuart Hayes, Robert Bassman
  • Publication number: 20050150105
    Abstract: A method of reducing noise induced from reference plane currents is disclosed. The method includes routing a first path for an electrical trace on a circuit board such that the first path references a voltage plane. The method further includes routing a second path for the electrical trace on the circuit board such that the second path references a ground plane whereby the second path is substantially similar to the first path. The method further includes electrically coupling the first path to the second path at each of the ends of the first and second paths such that noise induced into the electrical trace is reduced.
    Type: Application
    Filed: January 8, 2004
    Publication date: July 14, 2005
    Applicant: Dell Products L.P.
    Inventors: Stuart Hayes, Shane Chiasson
  • Publication number: 20050130501
    Abstract: A method and system are provided for reducing impedance discontinuities which occur when two expansion connectors are located very close to one another on a bus in an information handling system. An interconnect is situated between the two expansion connectors and exhibits an impedance which is selected to be sufficiently low to compensate for the amount by which the impedance of the expansion bus connectors exceeds the impedance of the expansion bus connected thereto.
    Type: Application
    Filed: February 1, 2005
    Publication date: June 16, 2005
    Applicant: Dell Products L.P.
    Inventors: Ian Timmins, Michael Leins, Stuart Hayes, Robert Bassman
  • Patent number: 6868467
    Abstract: A method and apparatus are provided for reducing impedance discontinuities which occur when two expansion connectors are located very close to one another on a bus in an information handling system. An interconnect is situated between the two expansion connectors and exhibits an impedance which is selected to be sufficiently low to compensate for the amount by which the impedance of the expansion bus connectors exceeds the impedance of the expansion bus connected thereto.
    Type: Grant
    Filed: July 3, 2003
    Date of Patent: March 15, 2005
    Assignee: Dell Products L.P.
    Inventors: Ian Timmins, Michael Leins, Stuart Hayes, Robert Bassman
  • Publication number: 20050001649
    Abstract: A method and apparatus are provided for reducing impedance discontinuities which occur when two expansion connectors are located very close to one another on a bus in an information handling system. An interconnect is situated between the two expansion connectors and exhibits an impedance which is selected to be sufficiently low to compensate for the amount by which the impedance of the expansion bus connectors exceeds the impedance of the expansion bus connected thereto.
    Type: Application
    Filed: July 3, 2003
    Publication date: January 6, 2005
    Applicant: Dell Products L.P.
    Inventors: Ian Timmins, Michael Leins, Stuart Hayes, Robert Bassman
  • Patent number: 6286066
    Abstract: Adapter cards generally have a metal bracket at one end. The adapter card attaches to an adapter card slot of a computer system by fastening the bracket to a connector on the computer system. Conventionally, the bracket is fastened to the connector using a screw. It has been discovered that an electrically-conductive flip-down retainer advantageously functions as an improved fastener to secure the adapter card to the connector. The electrically-conductive flip-down retainer is a single structure that performs the combined functions of an electrical switch and a mechanical fastener. The electrically-conductive flip-down retainer includes electrical contacts that form a closed circuit when the bracket is fastened to the connector and an open circuit when the bracket is not fastened. The electrical contacts are connected to conductors extending to a controller.
    Type: Grant
    Filed: December 15, 1998
    Date of Patent: September 4, 2001
    Assignee: Dell U.S.A., L.P.
    Inventors: Stuart Hayes, Mukund P. Khatri
  • Patent number: 5991158
    Abstract: A switch is disclosed for indicating that a computer card is installed in an expansion slot of a computer. A conductive strip attaches to an end wall of the slot and deforms when a computer card is installed. A conductive contact is provided in the wall of the slot to complete an electrical connection when the conductive strip is deformed. The strip connects electrically to a conductor that is passively driven high by a voltage source and pull-up resistor. The contact connects electrically to ground, so that when the computer card causes the strip to touch the contact, the voltage on conductor is driven low, providing an indication to associated circuitry that a card is present in the slot. A pair of switches may be used to provide repetitive signals indicating a card is present. If only one switch is closed, the computer may indicate to the user that a card has been installed improperly, or contaminants are present in the slot.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: November 23, 1999
    Assignee: Dell USA, L.P.
    Inventors: Richard Chan, Stuart Hayes
  • Patent number: 5978860
    Abstract: A system and method for disabling and re-enabling peripheral devices (PDs) in a computer system is disclosed. The system includes a CPU, a host bus coupled to the CPU, a host-bus-to-peripheral-device-bus (HB/PDB) bridge coupled to the host bus, at least one PD, at least one peripheral device bus coupling the HB/PDB bridge and at least one PD, and a device, typically in the form of a digital gate, for selectively disabling and re-enabling at least one PD. The disclosed method operates in connection with a computer system having a CPU, a HB/PDB bridge coupled to the CPU and capable of sending a device-configuration-space-access-signal (DCSAS) to the DCSAS input pin of a target PD when attempting an access operation, such as a read or a write operation, on the target PD, and one or more system I/O registers having a CONFIG ENABLE bit that reflects a user's request to disable or re-enable a PD.
    Type: Grant
    Filed: August 13, 1997
    Date of Patent: November 2, 1999
    Assignee: Dell USA, L.P.
    Inventors: Wai-Ming Richard Chan, Stuart Hayes, James Van Artsdalen
  • Patent number: 5694029
    Abstract: A switching power supply system for digitally measuring switching regulator current is provided. The switching power supply contains a pulse-width-modulator (PWM) controller for providing a series of constant voltage and constant frequency pulses to a tank circuit. The tank circuit provides a DC current to an electronic system. The duty cycle of the pulses, however, is varied, depending on the current drain of the electronic system. A counter is attached to an output of the PWM controller to provide a count that is relative to the width of an output pulse from the PWM controller. The count is provided to a power control system that utilizes the value of the count to determine the current output of the PWM controller. The power control system is also connected to the output of the tank circuit to monitor the voltage output of the PWM controller. The power control system utilizes the determined current output, and the monitored voltage output to determine the instantaneous power output of the PWM controller.
    Type: Grant
    Filed: January 2, 1996
    Date of Patent: December 2, 1997
    Assignee: Dell USA, L.P.
    Inventors: Stuart Hayes, Joshua Titus
  • Patent number: 5692219
    Abstract: A system and method for disabling and re-enabling PCI-compliant devices in a computer system is disclosed. The system includes a CPU, a host bus coupled to the CPU, a PCI/Host bridge coupled to the host bus, one or more PCI-compliant devices, a PCI bus coupling the PCI/Host bridge and the PCI-compliant devices, and a device, typically in the form of a digital gate, for selectively disabling or re-enabling one or more of the PCI-compliant devices. The disclosed method operates in connection with a computer system having a CPU, a PCI/Host bridge coupled to the CPU and capable of sending an IDSEL signal to the IDSEL input pin of a target PCI-compliant device when attempting a read or write operation on the target PCI-compliant device, and one or more system I/O registers having a CONFIG ENABLE bit that reflects a user's request to disable or re-enable a PCI-compliant device.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: November 25, 1997
    Assignee: Dell USA, LP
    Inventors: Wai-Ming Richard Chan, Stuart Hayes, James Van Artsdalen
  • Patent number: D1017431
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: March 12, 2024
    Assignee: GENERAC POWER SYSTEMS, INC.
    Inventors: Jonathan Hayes, Steve Caelers, Dave Lynch, Stuart Lombard
  • Patent number: D1018331
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: March 19, 2024
    Assignee: GENERAC POWER SYSTEMS, INC.
    Inventors: Jonathan Hayes, Steve Caelers, Dave Lynch, Stuart Lombard