Patents by Inventor Stuart T. Hopkins

Stuart T. Hopkins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Microprocessor having single poly-silicon EPROM memory for programmably controlling optional features
    Patent number: 5852712
    Abstract: A CMOS microprocessor chip includes an on-chip single-poly EPROM that is process compatible with the CMOS process used to manufacture the microprocessor. The EPROM is used to store manufacturing and contract related data such as serial number, customer, and process related data such as wafer number test results, binning data, etc. This provides important information for quality and reliability control. The EPROM is also used to control selection of optional microprocessor features such as speed governing, pin-out and I/O bus interface configuration. A third use is for trimming of critical circuit elements and for cache redundancy fault control.
    Type: Grant
    Filed: September 8, 1997
    Date of Patent: December 22, 1998
    Assignee: Intel Corporation
    Inventors: Michael J. Allen, Gregory K. Crain, Stephen A. Fischer, Patrick P. Gelsinger, David R. Gray, Stuart T. Hopkins, Gustay Laub, III, Charles H. Lucas, Richard D. Pashley, Babak Sabi, Joseph D. Schutz, David J. Shield, Stephen F. Sullivan
  • Microprocessor having single poly-silicon EPROM memory for programmably controlling optional features
    Patent number: 5732207
    Abstract: A CMOS microprocessor chip includes an on-chip single-poly EPROM that is process-compatible with the CMOS process used to manufacture the microprocessor. The EPROM is used to store manufacturing and contract related data such as serial number, customer, and process related data such as wafer number test results, binning data, etc. This provides important information for quality and reliability control. The EPROM is also used to control selection of optional microprocessor features such as speed governing, pin-out and I/O bus interface configuration. A third use is for trimming of critical circuit elements and for cache redundancy fault control.
    Type: Grant
    Filed: February 28, 1995
    Date of Patent: March 24, 1998
    Assignee: Intel Corporation
    Inventors: Michael J. Allen, Gregory K. Crain, Stephen A. Fischer, Patrick P. Gelsinger, David R. Gray, Stuart T. Hopkins, Gustav Laub, III, Charles H. Lucas, Richard D. Pashley, Babak Sabi, Joseph D. Schutz, David J. Shield, Stephen F. Sullivan