Patents by Inventor Su Chun Wang
Su Chun Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240128178Abstract: A method of forming a semiconductor structure is provided, and includes trimming a first substrate to form a recess on a sidewall of the first substrate. A conductive structure is formed in the first substrate. The method includes bonding the first substrate to a carrier. The method includes thinning down the first substrate. The method also includes forming a dielectric material in the recess and over a top surface of the thinned first substrate. The method further includes performing a planarization process to remove the dielectric material and expose the conductive structure over the top surface. In addition, the method includes removing the carrier from the first substrate.Type: ApplicationFiled: February 8, 2023Publication date: April 18, 2024Inventors: Yu-Hung LIN, Wei-Ming WANG, Su-Chun YANG, Jih-Churng TWU, Shih-Peng TAI, Kuo-Chung YEE
-
Publication number: 20240072128Abstract: A method of forming a semiconductor device includes forming a source/drain region and a gate electrode adjacent the source/drain region, forming a hard mask over the gate electrode, forming a bottom mask over the source/drain region, wherein the gate electrode is exposed, and performing a nitridation process on the hard mask over the gate electrode. The bottom mask remains over the source/drain region during the nitridation process and is removed after the nitridation. The method further includes forming a silicide over the source/drain region after removing the bottom mask.Type: ApplicationFiled: November 6, 2023Publication date: February 29, 2024Inventors: Tsan-Chun Wang, Su-Hao Liu, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo
-
Patent number: 8582665Abstract: An image processing circuit includes a compression circuit, a plurality of first line buffers, a decompression circuit, and a motion estimation/compensation circuit. The compression circuit receives source image data and compresses the received source image data to generate a compressed image data. The first line buffers, coupled to the compression circuit, sequentially receive the compressed image data and buffer the compressed image data. The decompression circuit, coupled to the first line buffers, decompresses the compressed image data to generate a decompressed image data. The motion estimation/compression circuit, coupled to the decompression circuit, performs motion estimation/compensation according to the decompressed image data.Type: GrantFiled: June 8, 2009Date of Patent: November 12, 2013Assignee: MStar Semiconductor, Inc.Inventors: Chung-Yi Chen, Su-Chun Wang
-
Patent number: 8531598Abstract: An image processing method of generating a target image block of a position to be currently interpolated in an interpolated frame between two frames includes: performing a motion estimation for generating a motion vector by referring to a plurality of image blocks of the two frames and generating a first image block according to the motion vector; generating a second image block according to two image blocks which are respectively in the two frames and both correspond to the position to be currently interpolated; and generating the target image block according to the first image block and the second image block.Type: GrantFiled: August 8, 2008Date of Patent: September 10, 2013Assignee: MStar Semiconductor, Inc.Inventors: Chung-Yi Chen, Su-Chun Wang
-
Patent number: 8498339Abstract: The invention provides a video processing method, which includes: performing motion estimation upon the target image block and a plurality of reference image blocks to calculate a plurality of block matching differences; determining a minimum block matching difference from the plurality of the block matching differences; comparing the minimum block matching difference with at least one of the reference block matching differences to obtain at least a comparison result; and according to the at least a comparison result, selectively determining a target motion vector of the target image block referred to a motion vector of at least a neighboring image block of the target image block or a motion vector corresponding to the minimum block matching difference.Type: GrantFiled: May 19, 2008Date of Patent: July 30, 2013Assignee: MStar Semiconductor, Inc.Inventors: Chung-Yi Chen, Su-Chun Wang
-
Patent number: 8446523Abstract: An image processing circuit includes a de-interlace circuit, a motion interpolation circuit and a frame processing circuit. The image processing circuit receives a first field and a second field respectively from two successive film frames. A plurality of block motion vectors are calculated according to the first field and the second field. A plurality of interpolated frames are calculated according to the first field, the second field and the plurality of motion vectors.Type: GrantFiled: December 4, 2009Date of Patent: May 21, 2013Assignee: MStar Semiconductor, Inc.Inventors: Su-Chun Wang, Chung-Yi Chen
-
Patent number: 8437399Abstract: A method and an associated apparatus for determining a motion vector are disclosed. The method includes performing block matching for a first block where an interpolated block is located according to the first frame and the second frame to generate a first candidate motion vector of the interpolated block, performing block matching for a second block where the interpolated block is located according to the first frame and the second frame to generate a second candidate motion vector of the interpolated block, and determining a target motion vector of the interpolated block according to either of the first motion vector and the second candidate motion vector.Type: GrantFiled: February 6, 2009Date of Patent: May 7, 2013Assignee: MStar Semiconductor, Inc.Inventors: Chung-Yi Chen, Su Chun Wang
-
Publication number: 20110316992Abstract: An image playback system displays three-dimensional (3D) content data via a pair of glasses together with a monitor to provide a multiplexing service to a user wearing different types of glasses via a single monitor. For a multiplexing service, the monitor interleaving displays frames of different content data to provide predetermined content data to the user while the glasses shelters other content data.Type: ApplicationFiled: March 31, 2011Publication date: December 29, 2011Applicant: MSTAR SEMICONDUCTOR, INC.Inventors: Kun-Nan Cheng, Su-Chun Wang, Chih Wei Chen
-
Publication number: 20100238348Abstract: An image processing circuit includes a de-interlace circuit, a motion interpolation circuit and a frame processing circuit. The image processing circuit receives a first field and a second field respectively from two successive film frames. A plurality of block motion vectors are calculated according to the first field and the second field. A plurality of interpolated frames are calculated according to the first field, the second field and the plurality of motion vectors.Type: ApplicationFiled: December 4, 2009Publication date: September 23, 2010Applicant: Image Processing Method and CircuitInventors: SU-CHUN WANG, CHUNG-YI CHEN
-
Publication number: 20090322957Abstract: An image processing method includes: detecting a motion vector of a source image block within a first video image to determine a flag value of the source image block, wherein the flag is used for indicating whether image content of the source image block correspondingly includes sight variations; and determining a target motion vector used for an interpolated image block according to the flag value.Type: ApplicationFiled: June 25, 2009Publication date: December 31, 2009Applicant: MSTAR SEMICONDUCTOR, INC.Inventors: Chung-Yi Chen, Su-Chun Wang
-
Publication number: 20090316044Abstract: A method and an associated apparatus for determining a motion vector are disclosed. The method includes performing block matching for a first block where an interpolated block is located according to the first frame and the second frame to generate a first candidate motion vector of the interpolated block, performing block matching for a second block where the interpolated block is located according to the first frame and the second frame to generate a second candidate motion vector of the interpolated block, and determining a target motion vector of the interpolated block according to either of the first motion vector and the second candidate motion vector.Type: ApplicationFiled: February 6, 2009Publication date: December 24, 2009Applicant: MSTAR SEMICONDUCTOR, INC.Inventors: Chung-Yi Chen, Su Chun Wang
-
Publication number: 20090316799Abstract: An image processing circuit includes a compression circuit, a plurality of first line buffers, a decompression circuit, and a motion estimation/compensation circuit. The compression circuit receives source image data and compresses the received source image data to generate a compressed image data. The first line buffers, coupled to the compression circuit, sequentially receive the compressed image data and buffer the compressed image data. The decompression circuit, coupled to the first line buffers, decompresses the compressed image data to generate a decompressed image data. The motion estimation/compression circuit, coupled to the decompression circuit, performs motion estimation/compensation according to the decompressed image data.Type: ApplicationFiled: June 8, 2009Publication date: December 24, 2009Applicant: MStar Semiconductor, Inc.Inventors: Chung-Yi Chen, Su-Chun Wang
-
Publication number: 20090195698Abstract: The invention provides a video processing method, which includes: performing motion estimation upon the target image block and a plurality of reference image blocks to calculate a plurality of block matching differences; determining a minimum block matching difference from the plurality of the block matching differences; comparing the minimum block matching difference with at least one of the reference block matching differences to obtain at least a comparison result; and according to the at least a comparison result, selectively determining a target motion vector of the target image block referred to a motion vector of at least a neighboring image block of the target image block or a motion vector corresponding to the minimum block matching difference.Type: ApplicationFiled: May 19, 2008Publication date: August 6, 2009Inventors: Chung-Yi Chen, Su-Chun Wang
-
Publication number: 20090167935Abstract: An image processing method of generating a target image block of a position to be currently interpolated in an interpolated frame between two frames includes: performing a motion estimation for generating a motion vector by referring to a plurality of image blocks of the two frames and generating a first image block according to the motion vector; generating a second image block according to two image blocks which are respectively in the two frames and both correspond to the position to be currently interpolated; and generating the target image block according to the first image block and the second image block.Type: ApplicationFiled: August 8, 2008Publication date: July 2, 2009Inventors: Chung-Yi Chen, Su-Chun Wang