Patents by Inventor Su-Gyeong Lee

Su-Gyeong Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12087323
    Abstract: This application relates to a device and a method for voice-based trauma screening using deep learning. The device and method for voice-based trauma screening using deep learning screen for trauma through voices that may be obtained in a non-contact manner without limitations of space or situation. In one aspect, the device includes a memory configured to store at least one program and a processor configured to perform an operation by executing the at least one program. The processor can obtain voice data, pre-process the voice data, convert pre-processed voice data into image data, and input the image data to a deep learning model and obtain a trauma result value as an output value of the deep learning model.
    Type: Grant
    Filed: November 16, 2021
    Date of Patent: September 10, 2024
    Assignee: EMOCOG CO., LTD.
    Inventors: Yoo Hun Noh, Eui Chul Lee, Na Hye Kim, So Eui Kim, Ji Won Mok, Su Gyeong Yu, Na Yeon Han
  • Patent number: 9005697
    Abstract: A method of manufacturing a thin film transistor array panel is provided, which includes: depositing an amorphous silicon layer on an insulating substrate; converting the amorphous silicon layer to a polysilicon layer by a plurality of laser shots using a mask; forming a gate insulating layer on the polysilicon layer; forming a plurality of gate lines on the gate insulating layer; forming a first interlayer insulating layer on the gate lines; forming a plurality of data lines on the first interlayer insulating layer; forming a second interlayer insulating layer on the data lines; and forming a plurality of pixel electrodes on the second interlayer insulating layer, wherein the mask comprises a plurality of transmitting areas and a plurality of blocking areas arranged in a mixed manner.
    Type: Grant
    Filed: October 3, 2007
    Date of Patent: April 14, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyun-Jae Kim, Sook-Young Kang, Dong-Byum Kim, Su-Gyeong Lee, Myung-Koo Kang
  • Patent number: 8027078
    Abstract: The present invention relates to a display device using a microelectromechanical system (MEMS) and to a manufacturing method thereof. A display device using a MEMS includes a first substrate comprising a first index of refraction; a second substrate facing the first substrate; a reflective layer formed on the first substrate and having a first aperture; a transparent layer covering the first aperture and comprising a second refractive index; and a shutter arranged on the second substrate, wherein a difference between the first refractive index and the second refractive index is equal to or less than 0.1.
    Type: Grant
    Filed: April 22, 2010
    Date of Patent: September 27, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Min Cho, Sung-Jin Kim, Yu-Kwan Kim, Don-Chan Cho, Seul Lee, Jae-Byung Park, Su-Gyeong Lee, Seon-Tae Yoon
  • Publication number: 20110102876
    Abstract: The present invention relates to a display device using a microelectromechanical system (MEMS) and to a manufacturing method thereof. A display device using a MEMS includes a first substrate comprising a first index of refraction; a second substrate facing the first substrate; a reflective layer formed on the first substrate and having a first aperture; a transparent layer covering the first aperture and comprising a second refractive index; and a shutter arranged on the second substrate, wherein a difference between the first refractive index and the second refractive index is equal to or less than 0.1.
    Type: Application
    Filed: April 22, 2010
    Publication date: May 5, 2011
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Min CHO, Sung-Jin Kim, Yu-Kwan Kim, Don-Chan Cho, Seul Lee, Jae-Byung Park, Su-Gyeong Lee, Seon-Tae Yoon
  • Patent number: 7879700
    Abstract: A silicon crystallization system includes a beam generator generating a laser beam, first and second optical units for controlling the laser beam from the beam generator; and a stage for mounting a panel including an amorphous silicon layer to be polycrystallized by the laser beam from the optical units. The first optical unit makes the laser beam have a transverse edge and a longitudinal edge longer than the transverse edge, and the second optical unit makes the laser beam have a transverse edge and a longitudinal edge shorter than the transverse edge.
    Type: Grant
    Filed: February 24, 2004
    Date of Patent: February 1, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ui-Jin Chung, Dong-Byum Kim, Su-Gyeong Lee, Myung-Koo Kang, Hyun-Jae Kim
  • Patent number: 7691545
    Abstract: A crystallization mask for laser illumination for converting amorphous silicon into polysilicon is provided, which includes: a plurality of transmissive areas having a plurality of first slits for adjusting energy of the laser illumination passing through the mask; and an opaque area.
    Type: Grant
    Filed: September 19, 2006
    Date of Patent: April 6, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Su-Gyeong Lee, Hyun-Jae Kim, Myung-Koo Kang
  • Patent number: 7535467
    Abstract: An analog buffer, display device having the same and a method of driving the same are provided. The analog buffer applies an analog voltage to a load. The analog buffer includes a comparator and a transistor. The comparator is configured to compare an input voltage provided from an external device with the analog voltage applied to the load. The transistor is turned on to electrically charge the load when the analog voltage is lower than the input voltage or turned on to electrically discharge the load when the analog voltage is higher than the input voltage, and turned off when the analog voltage becomes substantially the same as the input voltage.
    Type: Grant
    Filed: May 5, 2005
    Date of Patent: May 19, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Cheol-Min Kim, Hyun-Jae Kim, Il-Gon Kim, Kook-Chul Moon, Chul-Ho Kim, Kee-Chan Park, Su-Gyeong Lee, Tae-Hyeong Park, Jin-Young Choi, Hyun-Sook Shim, Oh-Kyong Kwon
  • Publication number: 20080115718
    Abstract: A method of manufacturing a thin film transistor array panel is provided, which includes: depositing an amorphous silicon layer on an insulating substrate; converting the amorphous silicon layer to a polysilicon layer by a plurality of laser shots using a mask; forming a gate insulating layer on the polysilicon layer; forming a plurality of gate lines on the gate insulating layer; forming a first interlayer insulating layer on the gate lines; forming a plurality of data lines on the first interlayer insulating layer; forming a second interlayer insulating layer on the data lines; and forming a plurality of pixel electrodes on the second interlayer insulating layer, wherein the mask comprises a plurality of transmitting areas and a plurality of blocking areas arranged in a mixed manner.
    Type: Application
    Filed: October 3, 2007
    Publication date: May 22, 2008
    Inventors: Hyun-Jae Kim, Sook-Young Kang, Dong-Byum Kim, Su-Gyeong Lee, Myung-Koo Kang
  • Patent number: 7294857
    Abstract: A method of manufacturing a thin film transistor array panel is provided, which includes: depositing an amorphous silicon layer on an insulating substrate; converting the amorphous silicon layer to a polysilicon layer by a plurality of laser shots using a mask; forming a gate insulating layer on the polysilicon layer; forming a plurality of gate lines on the gate insulating layer; forming a first interlayer insulating layer on the gate lines; forming a plurality of data lines on the first interlayer insulating layer; forming a second interlayer insulating layer on the data lines; and forming a plurality of pixel electrodes on the second interlayer insulating layer, wherein the mask comprises a plurality of transmitting areas and a plurality of blocking areas arranged in a mixed manner.
    Type: Grant
    Filed: February 3, 2005
    Date of Patent: November 13, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Jae Kim, Sook-Young Kang, Dong-Byum Kim, Su-Gyeong Lee, Myung-Koo Kang
  • Patent number: 7223504
    Abstract: A crystallization mask for laser illumination for converting amorphous silicon into polysilicon is provided, which includes: a plurality of transmissive areas having a plurality of first slits for adjusting energy of the laser illumination passing through the mask; and an opaque area.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: May 29, 2007
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Su-Gyeong Lee, Hyun-Jae Kim, Myung-Koo Kang
  • Publication number: 20070042575
    Abstract: A plurality laser beams generated by a plurality of beam generators are synthesized by a beam synthesizer. The synthesized beam is splitted into a plurality of beamlets and provided for a plurality of optical units controlling the beamlets. Each beamlet controlled by each optical unit is illuminated onto an amorphous silicon layer deposited on a substrate that is mounted on a plurality of stages to be polycrystallized.
    Type: Application
    Filed: March 12, 2004
    Publication date: February 22, 2007
    Inventors: Su-Gyeong Lee, Dong-Byum Kim, Myung-Koo Kang, Ui-Jin Chung, Hyun-Jae Kim
  • Publication number: 20070015069
    Abstract: A crystallization mask for laser illumination for converting amorphous silicon into polysilicon is provided, which includes: a plurality of transmissive areas having a plurality of first slits for adjusting energy of the laser illumination passing through the mask; and an opaque area.
    Type: Application
    Filed: September 19, 2006
    Publication date: January 18, 2007
    Inventors: Su-Gyeong Lee, Hyun-Jae Kim, Myung-Koo Kang
  • Patent number: 7164153
    Abstract: A thin film transistor array panel is provided, which includes: a substrate including a plurality of pixel areas; a semiconductor layer formed on the substrate and including a plurality of pairs of first and second semiconductor portions in respective pixel areas; a first insulating layer formed on the semiconductor layer; a gate wire formed on the first insulating layer; a second insulating layer formed on the gate wire; a data wire formed on the second insulating layer; a third insulating layer formed on the data wire; a pixel electrode formed on the third insulating layer and connected to the data wire, wherein width and length of at least one of the first and the second semiconductor portions vary between at least two pixel areas.
    Type: Grant
    Filed: November 4, 2003
    Date of Patent: January 16, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Su-Gyeong Lee, Sook-Young Kang, Myung-Koo Kang, Hyun-Jae Kim, James S. Im
  • Publication number: 20060148165
    Abstract: A silicon crystallization system includes a beam generator generating a laser beam, first and second optical units for controlling the laser beam from the beam generator; and a stage for mounting a panel including an amorphous silicon layer to be polycrystallized by the laser beam from the optical units. The first optical unit makes the laser beam have a transverse edge and a longitudinal edge longer than the transverse edge, and the second optical unit makes the laser beam have a transverse edge and a longitudinal edge shorter than the transverse edge.
    Type: Application
    Filed: February 24, 2004
    Publication date: July 6, 2006
    Inventors: Ui-Jin Chung, Dong-Byum Kim, Su-Gyeong Lee, Myung-Koo Kang, Hyun-Jae Kim
  • Publication number: 20060102902
    Abstract: A thin film transistor array panel is provided, which includes: a substrate including a plurality of pixel areas; a semiconductor layer formed on the substrate and including a plurality of pairs of first and second semiconductor portions in respective pixel areas; a first insulating layer formed on the semiconductor layer; a gate wire formed on the first insulating layer; a second insulating layer formed on the gate wire; a data wire formed on the second insulating layer; a third insulating layer formed on the data wire; a pixel electrode formed on the third insulating layer and connected to the data wire, wherein width and length of at least one of the first and the second semiconductor portions vary between at least two pixel areas.
    Type: Application
    Filed: November 4, 2003
    Publication date: May 18, 2006
    Inventors: Su-Gyeong Lee, Sook-Young Kang, Myung-Koo Kang, Hyun-Jae Kim, James Im
  • Publication number: 20050258997
    Abstract: An analog buffer, display device having the same and a method of drving the same are provided. The analog buffer applies an analog voltage to a load. The analog buffer includes a comparator and a transistor. The comparator is configured to compare an input voltage provided from an external device with the analog voltage applied to the load. The transistor is turned on to electrically charge the load when the analog voltage is lower than the input voltage or turned on to electrically discharge the load when the analog voltage is higher than the input voltage, and turned off when the analog voltage becomes substantially the same as the input voltage.
    Type: Application
    Filed: May 5, 2005
    Publication date: November 24, 2005
    Inventors: Cheol-Min Kim, Hyun-Jae Kim, Il-Gon Kim, Kook-Chul Moon, Chul-Ho Kim, Kee-Chan Park, Su-Gyeong Lee, Tae-Hyeong Park, Jin-Young Choi, Hyun-Sook Shim, Oh-Kyong Kwon
  • Publication number: 20050151196
    Abstract: A method of manufacturing a thin film transistor array panel is provided, which includes: depositing an amorphous silicon layer on an insulating substrate; converting the amorphous silicon layer to a polysilicon layer by a plurality of laser shots using a mask; forming a gate insulating layer on the polysilicon layer; forming a plurality of gate lines on the gate insulating layer; forming a first interlayer insulating layer on the gate lines; forming a plurality of data lines on the first interlayer insulating layer; forming a second interlayer insulating layer on the data lines; and forming a plurality of pixel electrodes on the second interlayer insulating layer, wherein the mask comprises a plurality of transmitting areas and a plurality of blocking areas arranged in a mixed manner.
    Type: Application
    Filed: February 3, 2005
    Publication date: July 14, 2005
    Inventors: Hyun-Jae Kim, Sook-Young Kang, Dong-Byum Kim, Su-Gyeong Lee, Myung-Koo Kang
  • Publication number: 20050151146
    Abstract: A crystallization mask for laser illumination for converting amorphous silicon into polysilicon is provided, which includes: a plurality of transmissive areas having a plurality of first slits for adjusting energy of the laser illumination passing through the mask; and an opaque area.
    Type: Application
    Filed: November 19, 2004
    Publication date: July 14, 2005
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Su-Gyeong Lee, Hyun-Jae Kim, Myung-Koo Kang
  • Patent number: 6906349
    Abstract: A method of manufacturing a thin film transistor array panel is provided, which includes: depositing an amorphous silicon layer on an insulating substrate; converting the amorphous silicon layer to a polysilicon layer by a plurality of laser shots using a mask; forming a gate insulating layer on the polysilicon layer; forming a plurality of gate lines on the gate insulating layer; forming a first interlayer insulating layer on the gate lines; forming a plurality of data lines on the first interlayer insulating layer; forming a second interlayer insulating layer on the data lines; and forming a plurality of pixel electrodes on the second interlayer insulating layer, wherein the mask comprises a plurality of transmitting areas and a plurality of blocking areas arranged in a mixed manner.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: June 14, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Jae Kim, Sook-Young Kang, Dong-Byum Kim, Su-Gyeong Lee, Myung-Koo Kang
  • Publication number: 20040201019
    Abstract: A method of manufacturing a thin film transistor array panel is provided, which includes: depositing an amorphous silicon layer on an insulating substrate; converting the amorphous silicon layer to a polysilicon layer by a plurality of laser shots using a mask; forming a gate insulating layer on the polysilicon layer; forming a plurality of gate lines on the gate insulating layer; forming a first interlayer insulating layer on the gate lines; forming a plurality of data lines on the first interlayer insulating layer; forming a second interlayer insulating layer on the data lines; and forming a plurality of pixel electrodes on the second interlayer insulating layer, wherein the mask comprises a plurality of transmitting areas and a plurality of blocking areas arranged in a mixed manner.
    Type: Application
    Filed: January 8, 2004
    Publication date: October 14, 2004
    Inventors: Hyun-Jae Kim, Sook-Young Kang, Dong-Byum Kim, Su-Gyeong Lee, Myung-Koo Kang