Abstract: An operating method of a controller, comprising: generating, when a first ECC decoding operation to codeword read from a semiconductor memory device according to a hard read voltage fails, an optimization information corresponding the result of the first ECC decoding operation; generating one or more quantization intervals determined by the optimization information; and performing a second ECC decoding operation to codeword read from the semiconductor memory device according to soft read voltages determined by the quantization intervals and the hard read voltage, wherein the optimization information includes: deterioration information of a memory block; ECC decoder parameter information; and constituent code parameter information.

Abstract: An operating method of a controller includes generating a square message matrix of k×k; and generating an encoded message by encoding the square message matrix row by row through a Bose-Chadhuri-Hocquenghem (BCH) code, wherein the square message matrix includes an upper triangular matrix and a lower triangular matrix, which are symmetrical to each other with reference to zero-padding blocks included in a diagonal direction in the square message matrix, wherein the upper triangular matrix includes “?” numbers of message blocks, each of which has a size of “?+1”, and “(N??)” numbers of message blocks, each of which has a size of “?”, and wherein “?”, “?” and N have relationships represented by equations 1 and 2: ? = ? M N ? [ Equation ? ? 1 ] ? = M ? ? mod ? ? N [ Equation ? ? 2 ] where “M” represents a size of a message input from a host and “N” represents a number of message blocks forming the upper triangular matrix.

Abstract: An operating method of a controller, comprising: generating, when a first ECC decoding operation to codeword read from a semiconductor memory device according to a hard read voltage fails, an optimization information corresponding the result of the first ECC decoding operation; generating one or more quantization intervals determined by the optimization information; and performing a second ECC decoding operation to codeword read from the semiconductor memory device according to soft read voltages determined by the quantization intervals and the hard read voltage, wherein the optimization information includes: deterioration information of a memory block; ECC decoder parameter information; and constituent code parameter information.

Abstract: A memory system includes a memory device; and a controller suitable for encoding a message, storing the encoded message in the memory device and decoding the encoded message, wherein the controller is suitable for generating a message matrix including predetermined row codes and predetermined column codes symmetrical to the predetermined row codes, with the message or the encoded message using a block-wise concatenated Bose-Chadhuri-Hocquenghem (BCH) code with a symmetrical structure.

Abstract: An operating method of a controller includes generating a square message matrix of k×k; and generating an encoded message by encoding the square message matrix row by row through a Bose-Chadhuri-Hocquenghem (BCH) code, wherein the square message matrix includes an upper triangular matrix and a lower triangular matrix, which are symmetrical to each other with reference to zero-padding blocks included in a diagonal direction in the square message matrix, wherein the upper triangular matrix includes “?” numbers of message blocks, each of which has a size of “?+1”, and “(N??)” numbers of message blocks, each of which has a size of “?”, and wherein “?”, “?” and N have relationships represented by equations 1 and 2: ? = ? M N ? [ Equation ? ? 1 ] ? = M ? ? mod ? ? N [ Equation ? ? 2 ] where “M” represents a size of a message input from a host and “N” represents a number of message blocks forming the upper triangular matrix.

Abstract: A memory system includes a memory device; and a controller suitable for encoding a message, storing the encoded message in the memory device and decoding the encoded message, wherein the controller is suitable for generating a message matrix including predetermined row codes and predetermined column codes symmetrical to the predetermined row codes, with the message or the encoded message using a block-wise concatenated Bose-Chadhuri-Hocquenghem (BCH) code with a symmetrical structure.

Abstract: An operation method of a flash memory system includes a hard decision decoding on a codeword and a soft decision decoding on an error message block. The hard decision decoding on a codeword and the codeword comprises message blocks encoded with row constituent codes and column constituent codes according to a block-wise concatenated BCH (BC-BCH) method. When the hard decision decoding fails, the error message block to which the hard decision decoding fails among a plurality of the message blocks is identified. Soft decision information corresponding to the row constituent codes and the column constituent codes of the error message block is generated and the soft decision decoding on the error message block based on the soft decision information is performed.

Abstract: An operation method of a flash memory system includes reading data stored in a memory device, wherein the data is encoded by units of message blocks each including a row constituent code and a column constituent code by using a block-wise concatenated Bose-Chadhuri-Hocquenghem (BC-BCH) method; performing a hard decision decoding on the read data; determining, when the hard decision decoding fails, a reference voltage for a message block having an error among the message blocks of the read data; and performing a soft decision decoding by using the determined reference voltage.

Abstract: An operation method of a flash memory system includes: performing hard decision decoding on a codeword, which is encoded in units of message blocks with row constituent codes and column constituent codes according to a block-wise concatenated BCH (BC-BCH) method; identifying a location of an error message block to which the hard decision decoding fails among a plurality of the message blocks, when the hard decision decoding fails; generating soft decision information corresponding to the row constituent codes and the column constituent codes of the error message block; and performing soft decision decoding on the error message block based on the soft decision information.

Abstract: An operation method of a flash memory system includes reading data stored in a memory device, wherein the data is encoded by units of message blocks each including a row constituent code and a column constituent code by using a block-wise concatenated Bose-Chadhuri-Hocquenghem (BC-BCH) method; performing a hard decision decoding on the read data; determining, when the hard decision decoding fails, a reference voltage for a message block having an error among the message blocks of the read data; and performing a soft decision decoding by using the determined reference voltage.