Abstract: The electrode of a storage capacitor of a DRAM cell lies diagonally along the memory cell. The diagonal layout makes the length of the capacitor longer than either the x-dimension or the y-dimension of the memory cell, thus increasing the storage capacitance.

Abstract: The electrode of a storage capacitor of a DRAM cell lies diagonally along the memory cell. The diagonal layout makes the length of the capacitor longer than either the x-dimension or the y-dimension of the memory cell, thus increasing the storage capacitance.

Abstract: The polysilicon bottom electrode of a stacked fin structure storage capacitor for a DRAM cell is self-aligned with the buried contact to the diffusion of a MOSFET. A silicon nitride layer and a sacrificial oxide (sac) umbrella overhangs the buried contact. Using the sac oxide as a mask, the silicon nitride layer is undercut until a part of the polysilicon buried contact is exposed. Then another polysilicon layer is deposited to contact the buried contact and to form the bottom electrode of the capacitor. Thus the bottom electrode and the buried contact are self-aligned. Again, using the sac oxide as a mask, the bottom electrode is etched laterally to form fin-shape electrode. Then, the bottom electrode is deposited with a capacitor dielectric and a top electrode to form the storage capacitor.