Patents by Inventor Su-Jeong Sim

Su-Jeong Sim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Input circuit of semiconductor memory apparatus and controlling method thereof
    Patent number: 8477557
    Abstract: Disclosed is an input circuit of a semiconductor memory apparatus. The input circuit includes a first buffer and a second buffer. The first buffer has an input terminal connected with a first input pin for receiving a control signal used in a multi-control mode for controlling an entire memory area by dividing the entire memory area, and an output terminal having a first level according to a control mode signal. The second buffer has an input terminal connected with a second input pin for receiving one of plural signals used in a single control mode for controlling the entire memory area without dividing the entire memory area, and an output terminal having a second level according to the control mode signal.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: July 2, 2013
    Assignee: SK hynix Inc.
    Inventors: Young Ju Kim, Su Jeong Sim
  • INPUT CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS AND CONTROLLING METHOD THEREOF
    Publication number: 20120033523
    Abstract: Disclosed is an input circuit of a semiconductor memory apparatus. The input circuit includes a first buffer and a second buffer. The first buffer has an input terminal connected with a first input pin for receiving a control signal used in a multi-control mode for controlling an entire memory area by dividing the entire memory area, and an output terminal having a first level according to a control mode signal. The second buffer has an input terminal connected with a second input pin for receiving one of plural signals used in a single control mode for controlling the entire memory area without dividing the entire memory area, and an output terminal having a second level according to the control mode signal.
    Type: Application
    Filed: September 30, 2011
    Publication date: February 9, 2012
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Young Ju Kim, Su Jeong Sim
  • Input circuit of semiconductor memory apparatus and controlling method thereof
    Patent number: 8031533
    Abstract: Disclosed is an input circuit of a semiconductor memory apparatus. The input circuit includes a first buffer and a second buffer. The first buffer has an input terminal connected with a first input pin for receiving a control signal used in a multi-control mode for controlling an entire memory area by dividing the entire memory area, and an output terminal having a first level according to a control mode signal. The second buffer has an input terminal connected with a second input pin for receiving one of plural signals used in a single control mode for controlling the entire memory area without dividing the entire memory area, and an output terminal having a second level according to the control mode signal.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: October 4, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Young Ju Kim, Su Jeong Sim
  • Semiconductor apparatus, on-die termination circuit, and control method of the same
    Patent number: 7719308
    Abstract: An on-die termination circuit of a semiconductor apparatus can include: a code converting unit configured to change a code value of a termination code in response to a termination control signal; and a plurality of on-die termination blocks configured to commonly receive the termination code, and perform a termination operation.
    Type: Grant
    Filed: July 24, 2008
    Date of Patent: May 18, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Su-Jeong Sim
  • INPUT CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS AND CONTROLLING METHOD THEREOF
    Publication number: 20090207683
    Abstract: Disclosed is an input circuit of a semiconductor memory apparatus. The input circuit includes a first buffer and a second buffer. The first buffer has an input terminal connected with a first input pin for receiving a control signal used in a multi-control mode for controlling an entire memory area by dividing the entire memory area, and an output terminal having a first level according to a control mode signal. The second buffer has an input terminal connected with a second input pin for receiving one of plural signals used in a single control mode for controlling the entire memory area without dividing the entire memory area, and an output terminal having a second level according to the control mode signal.
    Type: Application
    Filed: December 11, 2008
    Publication date: August 20, 2009
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Young Ju Kim, Su Jeong Sim
  • SEMICONDUCTOR APPARATUS, ON-DIE TERMINATION CIRCUIT, AND CONTROL METHOD OF THE SAME
    Publication number: 20090121741
    Abstract: An on-die termination circuit of a semiconductor apparatus can include: a code converting unit configured to change a code value of a termination code in response to a termination control signal; and a plurality of on-die termination blocks configured to commonly receive the termination code, and perform a termination operation.
    Type: Application
    Filed: July 24, 2008
    Publication date: May 14, 2009
    Applicant: HYNIX SEMICONDUCTOR, INC.
    Inventor: Su Jeong Sim