Patents by Inventor Su Jeong Suh
Su Jeong Suh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10079100Abstract: Provided is a capacitor, which includes a first electrode including aluminum, a second electrode facing the first electrode, and a first dielectric layer interposed between the first electrode and the second electrode, including aluminum oxide, and having multiple pores defined in a surface of the first dielectric layer in contact with the second electrode.Type: GrantFiled: September 25, 2015Date of Patent: September 18, 2018Assignee: Research & Business Foundation Sungkyunkwan UniversityInventors: Su-jeong Suh, Jin-ha Shin, Chang-hyoung Lee
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Patent number: 9850592Abstract: Provided is a method of forming a complex plating film using multi-layer graphene metal particles. The method of forming the plating film may include preparing a powder with a metal particle structure coated with multi-layer graphene, and forming a plating film by adding the powder to a plating solution through electric plating.Type: GrantFiled: July 21, 2015Date of Patent: December 26, 2017Assignee: Research & Business Foundation Sungkyunkwan UniversityInventors: Su-Jeong Suh, Young-Il Song, Jung-Ho Park, Jung-Kab Park, Tae-Yoo Kim, Hwa-Jin Son, Jin-Ha Shin, Mi-Ri Lee, Jungwoo Lee, Changhyoung Lee, Younglae Cho, Seung-Bin Baeg, Byung-Wook Ahn, Sook-Young Yun
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Patent number: 9356005Abstract: Disclosed herein is a light emitting diode (LED) package. The present invention is directed to a light emitting diode (LED) package capable of efficiently dissipating heat generated from LEDs. The present invention is also directed to a LED package in which a plurality of LEDs are disposed and heat generated from the plurality of LEDs is efficiently dissipated.Type: GrantFiled: May 27, 2015Date of Patent: May 31, 2016Assignee: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITYInventors: Su-jeong Suh, Hwa-sun Park, Jung-kab Park, Tae-yoo Kim, Young-lae Cho, Mi-ri Lee, Jin-ha Shin, Hwa-jin Son, Jung-woo Lee
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Publication number: 20160093436Abstract: Provided is a capacitor, which includes a first electrode including aluminum, a second electrode facing the first electrode, and a first dielectric layer interposed between the first electrode and the second electrode, including aluminum oxide, and having multiple pores defined in a surface of the first dielectric layer in contact with the second electrode.Type: ApplicationFiled: September 25, 2015Publication date: March 31, 2016Applicant: Research & Business Foundation Sungkyunkwan UniversityInventors: Su-jeong SUH, Jin-ha SHIN, Chang-hyoung LEE
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Publication number: 20160024681Abstract: Provided is a method of forming a complex plating film using multi-layer graphene metal particles. The method of forming the plating film may include preparing a powder with a metal particle structure coated with multi-layer graphene, and forming a plating film by adding the powder to a plating solution through electric plating.Type: ApplicationFiled: July 21, 2015Publication date: January 28, 2016Applicant: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITYInventors: Su-Jeong SUH, Young-Il SONG, Jung-Ho PARK, Jung-Kab PARK, Tae-Yoo KIM, Hwa-Jin SON, Jin-Ha SHIN, Mi-Ri LEE, Jungwoo LEE, Changhyoung LEE, Younglae CHO, Seung-Bin BAEG, Byung-Wook AHN, Sook-Young YUN
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Publication number: 20150348950Abstract: Disclosed herein is a light emitting diode (LED) package. The present invention is directed to a light emitting diode (LED) package capable of efficiently dissipating heat generated from LEDs. The present invention is also directed to a LED package in which a plurality of LEDs are disposed and heat generated from the plurality of LEDs is efficiently dissipated.Type: ApplicationFiled: May 27, 2015Publication date: December 3, 2015Applicant: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITYInventors: Su-jeong SUH, Hwa-sun PARK, Jung-kab PARK, Tae-yoo KIM, Young-lae CHO, Mi-ri LEE, Jin-ha SHIN, Hwa-jin SON, Jung-woo LEE
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Patent number: 9136455Abstract: A substrate for a semiconductor device is provided. The substrate includes a first metal line, a second metal line, a metal support part, a first insulating part, and a second insulating part. The first metal line is electrically connected to a first electrode of the semiconductor device. The second metal line is electrically connected to a second electrode of the semiconductor device and spaced apart from the first metal line. The metal support part is disposed between the first metal line and the second metal line. The first insulating part is disposed between the first metal line and the metal support part and configured to electrically insulate the first metal line from the metal support part. The second insulating part is disposed between the second metal line and the metal support part and configured to electrically insulate the second metal line from the metal support part.Type: GrantFiled: March 4, 2015Date of Patent: September 15, 2015Assignee: Research & Business Foundation Sungkyunkwan UniversityInventors: Su Jeong Suh, Hwa Sun Park, Hyeong Chul Youn
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Publication number: 20150200343Abstract: A substrate for a light emitting diode (LED) and a method of manufacturing the substrate for the LED are provided. The substrate for the LED includes a conductive substrate which includes an upper surface including a first flat surface and a second flat surface stepped from the first flat surface, an insulating layer formed on the second flat surface, and an electrode layer spaced apart from the first flat surface and disposed on the insulating layer.Type: ApplicationFiled: January 13, 2015Publication date: July 16, 2015Applicant: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITYInventors: Su-jeong SUH, Hwa-sun PARK, Jung-kab PARK, Young-lae CHO, Tae-yoo KIM, Jae-hoon SHIN, Jin-ha SHIN, Jung-woo LEE, Hwa-jin SON, Jung-ho PARK
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Publication number: 20150179908Abstract: A substrate for a semiconductor device is provided. The substrate includes a first metal line, a second metal line, a metal support part, a first insulating part, and a second insulating part. The first metal line is electrically connected to a first electrode of the semiconductor device. The second metal line is electrically connected to a second electrode of the semiconductor device and spaced apart from the first metal line. The metal support part is disposed between the first metal line and the second metal line. The first insulating part is disposed between the first metal line and the metal support part and configured to electrically insulate the first metal line from the metal support part. The second insulating part is disposed between the second metal line and the metal support part and configured to electrically insulate the second metal line from the metal support part.Type: ApplicationFiled: March 4, 2015Publication date: June 25, 2015Applicant: Research & Business Foundation Sungkyunkwan UniversityInventors: Su Jeong SUH, Hwa Sun PARK, Hyeong Chul YOUN
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Patent number: 9000593Abstract: A substrate for a semiconductor device is provided. The substrate includes a first metal line, a second metal line, a metal support part, a first insulating part, and a second insulating part. The first metal line is electrically connected to a first electrode of the semiconductor device. The second metal line is electrically connected to a second electrode of the semiconductor device and spaced apart from the first metal line. The metal support part is disposed between the first metal line and the second metal line. The first insulating part is disposed between the first metal line and the metal support part and configured to electrically insulate the first metal line from the metal support part. The second insulating part is disposed between the second metal line and the metal support part and configured to electrically insulate the second metal line from the metal support part.Type: GrantFiled: August 7, 2012Date of Patent: April 7, 2015Assignee: Research & Business Foundation Sungkyunkwan UniversityInventors: Su Jeong Suh, Hwa Sun Park, Hyeong Chul Youn
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Patent number: 8957448Abstract: An LED package and method thereof include an insulation plate, and a metal board disposed on the insulation plate and etched to form a cavity, wherein the metal board is etched to partially expose the insulation plate to form the cavity. The LED package and method also include an LED chip configured to be mounted inside the cavity, and an encapsulation member filling the cavity, wherein the encapsulation member comprises an epoxy resin. The LED package and method include a through-hole configured to be formed on the insulation plate where the LED chip is mounted. The through-hole enables portions of the LED chip to be exposed, and a metal configured to fill the through-hole to form an electrode to be electrically connected to the LED chip.Type: GrantFiled: March 29, 2012Date of Patent: February 17, 2015Assignee: Sungkyunkwan University Foundation for Corporate CollaborationInventors: Su Jeong Suh, Haw Sun Park
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Patent number: 8951835Abstract: A method of fabricating a package substrate, includes forming a cavity in at least one region of an upper surface of a wafer, the cavity including a chip mounting region, forming a through-hole penetrating through the wafer and a via filling the through-hole, forming a first wiring layer and a second wiring layer spaced apart from the first wiring layer, which are extended into the cavity, and mounting a chip in the cavity to be connected to the first wiring layer and the second wiring layer.Type: GrantFiled: October 25, 2013Date of Patent: February 10, 2015Assignees: Samsung Electro-Mechanics Co., Ltd., Sungkyunkwan University Foundation for Corporate CollaborationInventors: Seung Wook Park, Young Do Kweon, Jang Hyun Kim, Tae Seok Park, Su Jeong Suh, Jae Gwon Jang, Nam Jung Kim, Seung Kyu Lim, Kwang Keun Lee
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Publication number: 20140051212Abstract: A method of fabricating a package substrate, includes forming a cavity in at least one region of an upper surface of a wafer, the cavity including a chip mounting region, forming a through-hole penetrating through the wafer and a via filling the through-hole, forming a first wiring layer and a second wiring layer spaced apart from the first wiring layer, which are extended into the cavity, and mounting a chip in the cavity to be connected to the first wiring layer and the second wiring layer.Type: ApplicationFiled: October 25, 2013Publication date: February 20, 2014Applicants: SUNGKYUNKWAN UNIVERSITY Foundation for Corporate Collaboration, SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Seung Wook Park, Young Do Kweon, Jang Hyun Kim, Tae Seok Park, Su Jeong Suh, Jae Gwon Jang, Nam Jung Kim, Seung Kyu Lim, Kwang Keun Lee
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Publication number: 20130037955Abstract: A substrate for a semiconductor device is provided. The substrate includes a first metal line, a second metal line, a metal support part, a first insulating part, and a second insulating part. The first metal line is electrically connected to a first electrode of the semiconductor device. The second metal line is electrically connected to a second electrode of the semiconductor device and spaced apart from the first metal line. The metal support part is disposed between the first metal line and the second metal line. The first insulating part is disposed between the first metal line and the metal support part and configured to electrically insulate the first metal line from the metal support part. The second insulating part is disposed between the second metal line and the metal support part and configured to electrically insulate the second metal line from the metal support part.Type: ApplicationFiled: August 7, 2012Publication date: February 14, 2013Inventors: Su Jeong SUH, Hwa Sun Park, Hyeong Chul Youn
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Publication number: 20120248486Abstract: An LED package and method thereof include an insulation plate, and a metal board disposed on the insulation plate and etched to form a cavity, wherein the metal board is etched to partially expose the insulation plate to form the cavity. The LED package and method also include an LED chip configured to be mounted inside the cavity, and an encapsulation member filling the cavity, wherein the encapsulation member comprises an epoxy resin. The LED package and method include a through-hole configured to be formed on the insulation plate where the LED chip is mounted. The through-hole enables portions of the LED chip to be exposed, and a metal configured to fill the through-hole to form an electrode to be electrically connected to the LED chip.Type: ApplicationFiled: March 29, 2012Publication date: October 4, 2012Applicant: SUNGKYUNKWAN UNIVERSITYInventors: Su Jeong SUH, Haw Sun PARK
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Publication number: 20110248408Abstract: There are provided a package substrate and a method fabricating thereof. The package substrate includes: a wafer having a cavity formed in an upper surface thereof, the cavity including a chip mounting region; a first wiring layer and a second wiring layer formed to be spaced apart from the first wiring layer, which are formed to be extended in the cavity; a chip positioned in the chip mounting region to be connected to the first wiring layer and the second wiring layer; a through-hole penetrating through the wafer and a via filled in the through-hole; and at least one electronic device connected to the via. Accordingly, a package substrate capable of having a passive device having a predetermined capacity embedded therein, while reducing a pattern size and increasing a component mounting density, and a method fabricating thereof may be provided.Type: ApplicationFiled: March 24, 2011Publication date: October 13, 2011Applicants: SUNGKYUNKWAN UNIVERSITY Foundation for Corporate Collaboration, SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Seung Wook Park, Young Do Kweon, Jang Hyun Kim, Tae Seok Park, Su Jeong Suh, Jae Gwon Jang, Nam Jung Kim, Seung Kyu Lim, Kwang Keun Lee