Abstract: A semiconductor package includes a substrate, at least one semiconductor chip provided on an upper surface of the substrate, a molding layer provided on a portion of a sidewall of the at least one semiconductor chip, and a heat dissipation member comprising at least one trench that contacts an upper surface of the at least one semiconductor chip and another portion of the sidewall of the at least one semiconductor chip.

Abstract: A semiconductor package may include a first semiconductor chip on and electrically connected to a wiring substrate, an intermediate layer on the first semiconductor chip and covering an entire surface of the first semiconductor chip, a second semiconductor chip on the intermediate layer and electrically connected to the wiring substrate, a mold layer on the wiring substrate and covering the first semiconductor chip and the second semiconductor chip, the mold layer including one or more inner surfaces defining a mold via hole that exposes a portion of a surface of the intermediate layer, an electromagnetic shielding layer on the one or more inner surfaces of the mold layer and further on one or more outer surfaces of the mold layer, and a thermal discharge layer on the electromagnetic shielding layer in the mold via hole, such that the thermal discharge layer fills the mold via hole.

Abstract: A semiconductor package may include a first semiconductor chip on and electrically connected to a wiring substrate, an intermediate layer on the first semiconductor chip and covering an entire surface of the first semiconductor chip, a second semiconductor chip on the intermediate layer and electrically connected to the wiring substrate, a mold layer on the wiring substrate and covering the first semiconductor chip and the second semiconductor chip, the mold layer including one or more inner surfaces defining a mold via hole that exposes a portion of a surface of the intermediate layer, an electromagnetic shielding layer on the one or more inner surfaces of the mold layer and further on one or more outer surfaces of the mold layer, and a thermal discharge layer on the electromagnetic shielding layer in the mold via hole, such that the thermal discharge layer fills the mold via hole.

Abstract: A semiconductor package may include a first semiconductor chip on and electrically connected to a wiring substrate, an intermediate layer on the first semiconductor chip and covering an entire surface of the first semiconductor chip, a second semiconductor chip on the intermediate layer and electrically connected to the wiring substrate, a mold layer on the wiring substrate and covering the first semiconductor chip and the second semiconductor chip, the mold layer including one or more inner surfaces defining a mold via hole that exposes a portion of a surface of the intermediate layer, an electromagnetic shielding layer on the one or more inner surfaces of the mold layer and further on one or more outer surfaces of the mold layer, and a thermal discharge layer on the electromagnetic shielding layer in the mold via hole, such that the thermal discharge layer fills the mold via hole.

Abstract: A semiconductor package may include a first semiconductor chip on and electrically connected to a wiring substrate, an intermediate layer on the first semiconductor chip and covering an entire surface of the first semiconductor chip, a second semiconductor chip on the intermediate layer and electrically connected to the wiring substrate, a mold layer on the wiring substrate and covering the first semiconductor chip and the second semiconductor chip, the mold layer including one or more inner surfaces defining a mold via hole that exposes a portion of a surface of the intermediate layer, an electromagnetic shielding layer on the one or more inner surfaces of the mold layer and further on one or more outer surfaces of the mold layer, and a thermal discharge layer on the electromagnetic shielding layer in the mold via hole, such that the thermal discharge layer fills the mold via hole.

Abstract: A semiconductor package includes a thermal interface material layer located on semiconductor chips located on a surface of a substrate, and a curved surface type heat spreader on the thermal interface material layer, including a curved surface region including a curved surface in which a surface has an inflection point corresponding to a vicinity region between the semiconductor chips.

Abstract: Provided are a printed circuit board (PCB) capable of blocking introduction of impurities during a molding process so as to reduce damage on a semiconductor package, a method of manufacturing the PCB, and a method of manufacturing a semiconductor package by using the PCB. An embodiment includes an apparatus comprising: a substrate body comprising an active area and a dummy area on an outer portion of the active area, the substrate body extending lengthwise in a first direction; a plurality of semiconductor units mounted on the active area; and a barrier formed on the dummy area, wherein the barrier extends in the first direction.

Abstract: Provided are a printed circuit board (PCB) capable of blocking introduction of impurities during a molding process so as to reduce damage on a semiconductor package, a method of manufacturing the PCB, and a method of manufacturing a semiconductor package by using the PCB. An embodiment includes an apparatus comprising: a substrate body comprising an active area and a dummy area on an outer portion of the active area, the substrate body extending lengthwise in a first direction; a plurality of semiconductor units mounted on the active area; and a barrier formed on the dummy area, wherein the barrier extends in the first direction.