Abstract: Provided is a method of manufacturing a voice coil, and more particularly, a method of manufacturing a voice coil in which a coil pattern is formed on a wafer level package. The method includes (a) forming a first coil pattern including a first area in which a first seed metal layer is exposed upward, a second area in which a first passivation layer for forming a via hole in the first area is formed, and a third area in which a first photoresist layer is formed in a portion of the first area and the second area on an upper surface of a wafer, (b) filling an inside of the via hole formed in the first coil pattern with a conductive material and forming first coil windings, and (c) removing the first photoresist layer formed in the third area.

Abstract: Provided is a method of manufacturing a voice coil, and more particularly, a method of manufacturing a voice coil in which a coil pattern is formed on a wafer level package. The method includes (a) forming a first coil pattern including a first area in which a first seed metal layer is exposed upward, a second area in which a first passivation layer for forming a via hole in the first area is formed, and a third area in which a first photoresist layer is formed in a portion of the first area and the second area on an upper surface of a wafer, (b) filling an inside of the via hole formed in the first coil pattern with a conductive material and forming first coil windings, and (c) removing the first photoresist layer formed in the third area.

Abstract: Provided is a method for manufacturing a voice coil, and more particularly, to a voice coil manufacturing method for forming a coil pattern on a wafer level package. The method for manufacturing a voice coil includes forming a first passivation layer on an upper surface of a wafer, forming a first coil directly on the first passivation layer, forming a second passivation layer on the first passivation layer and on an upper surface of the first coil, forming a third passivation layer on an upper surface of the second passivation layer, forming a second coil directly on the third passivation layer, and forming an external connection terminal on a portion of the second coil.

Abstract: Provided are a semiconductor package and a method for manufacturing a semiconductor package. The method for manufacturing a wafer-level fan-out package includes attaching semiconductor chips sawed to have a predetermined size to one surface of a wafer at predetermined intervals, forming a first passivation layer on surfaces of the semiconductor chips and the wafer, forming a redistribution layer electrically connected to the semiconductor chips on portions of an upper surface of the first passivation layer, forming a second passivation layer on the upper surface of the first passivation layer and surfaces of portions of the redistribution layer, forming external connection terminals on portions of the redistribution layer in which the second passivation layer has not been formed, and performing sawing along package boundary lines (sawing lines) and polishing the wafer to be removed such that lower surfaces of the semiconductor chips are exposed.