Patents by Inventor Su Min Cho

Su Min Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250097665
    Abstract: A chatting service method and apparatus is disclosed. A method of operating a server providing a chatting service corresponding to one or more themes, according to an embodiment, may include: receiving a message including area information through a chat room corresponding to a specific theme; providing a map interface for exposing information about the message to a terminal; determining an area range based on view manipulation information of the map interface received from the terminal; extracting message information corresponding to the area range; and providing the extracted message information through the map interface.
    Type: Application
    Filed: September 17, 2024
    Publication date: March 20, 2025
    Inventors: Soo Yeun JANG, Su Min CHO, Hae Yoon CHO, Maria PARK
  • Patent number: 12080774
    Abstract: A semiconductor device includes a substrate including a first region and a second region, a first silicon-germanium film which is conformally formed inside a surface of the substrate of the first region and defines a first gate trench, a first gate insulating film which extends on the first silicon-germanium film along a profile of the first gate trench and is in physical contact with the first silicon-germanium film, a first metallic gate electrode on the first gate insulating film, a source/drain region formed inside the substrate on both sides of the first metallic gate electrode, a second gate insulating film in the second region and a second metallic gate electrode on the second gate insulating film.
    Type: Grant
    Filed: October 16, 2023
    Date of Patent: September 3, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ho Kyun An, Su Min Cho
  • Publication number: 20240038863
    Abstract: A semiconductor device includes a substrate including a first region and a second region, a first silicon-germanium film which is conformally formed inside a surface of the substrate of the first region and defines a first gate trench, a first gate insulating film which extends on the first silicon-germanium film along a profile of the first gate trench and is in physical contact with the first silicon-germanium film, a first metallic gate electrode on the first gate insulating film, a source/drain region formed inside the substrate on both sides of the first metallic gate electrode, a second gate insulating film in the second region and a second metallic gate electrode on the second gate insulating film.
    Type: Application
    Filed: October 16, 2023
    Publication date: February 1, 2024
    Inventors: Ho Kyun An, Su Min Cho
  • Patent number: 11824098
    Abstract: A semiconductor device includes a substrate including a first region and a second region, a first silicon-germanium film which is conformally formed inside a surface of the substrate of the first region and defines a first gate trench, a first gate insulating film which extends on the first silicon-germanium film along a profile of the first gate trench and is in physical contact with the first silicon-germanium film, a first metallic gate electrode on the first gate insulating film, a source/drain region formed inside the substrate on both sides of the first metallic gate electrode, a second gate insulating film in the second region and a second metallic gate electrode on the second gate insulating film.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: November 21, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ho Kyun An, Su Min Cho
  • Publication number: 20230200059
    Abstract: A method for manufacturing a semiconductor memory device comprises providing a substrate, etching a portion of the substrate that forms a trench therein, forming an element isolation film that fills the trench and defines an active area, herein the element isolation film includes a first liner that covers an inner sidewall and a bottom surface of the trench, wherein the first liner is recessed and exposes a corner portion of the substrate, doping nitrogen into the substrate, and forming a pre-gate insulating film that extends along and on the exposed corner portion of the substrate and an upper surface of the substrate. The pre-gate insulating film includes a first portion on the upper surface of the substrate, and a second portion on the corner portion of the substrate. A thickness of the first portion is less than a thickness of the second portion.
    Type: Application
    Filed: September 1, 2022
    Publication date: June 22, 2023
    Inventors: HO KYUN AN, Su Min Cho, Bum Soo Kim, Ha Young Kim
  • Publication number: 20220416038
    Abstract: A semiconductor device includes a substrate including a first region and a second region, a first silicon-germanium film which is conformally formed inside a surface of the substrate of the first region and defines a first gate trench, a first gate insulating film which extends on the first silicon-germanium film along a profile of the first gate trench and is in physical contact with the first silicon-germanium film, a first metallic gate electrode on the first gate insulating film, a source/drain region formed inside the substrate on both sides of the first metallic gate electrode, a second gate insulating film in the second region and a second metallic gate electrode on the second gate insulating film.
    Type: Application
    Filed: August 26, 2022
    Publication date: December 29, 2022
    Inventors: Ho Kyun An, Su Min Cho
  • Patent number: 11456366
    Abstract: A semiconductor device includes a substrate including a first region and a second region, a first silicon-germanium film which is conformally formed inside a surface of the substrate of the first region and defines a first gate trench, a first gate insulating film which extends on the first silicon-germanium film along a profile of the first gate trench and is in physical contact with the first silicon-germanium film, a first metallic gate electrode on the first gate insulating film, a source/drain region formed inside the substrate on both sides of the first metallic gate electrode, a second gate insulating film in the second region and a second metallic gate electrode on the second gate insulating film.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: September 27, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ho Kyun An, Su Min Cho
  • Publication number: 20220115511
    Abstract: A semiconductor device includes a substrate including a first region and a second region, a first silicon-germanium film which is conformally formed inside a surface of the substrate of the first region and defines a first gate trench, a first gate insulating film which extends on the first silicon-germanium film along a profile of the first gate trench and is in physical contact with the first silicon-germanium film, a first metallic gate electrode on the first gate insulating film, a source/drain region formed inside the substrate on both sides of the first metallic gate electrode, a second gate insulating film in the second region and a second metallic gate electrode on the second gate insulating film.
    Type: Application
    Filed: June 1, 2021
    Publication date: April 14, 2022
    Inventors: Ho Kyun An, Su Min Cho