Abstract: A method of manufacturing of a photodiode is provided. The photodiode is formed on a substrate of a first conductive type. First, an isolation structure is formed in the substrate to define a photosensitive area in the substrate. Thereafter, trenches are formed in the substrate. Next, a doped layer of a second conductive type is formed on the substrate. The doped layer covers at least the inner wall of the trenches and a top portion of the substrate. The method of fabricating the photodiode can reduce overall processing time and cost and improve production efficiency.

Abstract: A method of fabricating conductive lines is described. A substrate having a polysilicon layer thereon is provided. A mask layer having an opening that exposes the polysilicon layer is formed on the polysilicon layer. Then, spacers are formed on the sidewalls of the mask layer. Using the mask layer and the spacers as a mask, a portion of the polysilicon layer is removed until the substrate is exposed. After that, an insulating layer that completely fills the opening is formed over the substrate. The insulating layer has an etching selectivity different from the mask layer. Thereafter, the mask layer is removed to expose the polysilicon layer and then a metal silicide layer is formed on the upper surface of the polysilicon layer.

Abstract: A method for forming a buried doped region is provided. A first insulating layer is formed on a substrate and the first insulating layer is patterned to from an opening that extends in a first direction. A buried doped region is formed in the substrate exposed by the opening. Thereafter, a second insulating layer is formed on the substrate to fill the opening. The second insulating layer together with the first insulation layer form a third insulating layer. The third insulating layer is patterned to form an isolation layer that exposes the substrate and the buried doped region. The isolation layer extends in a second direction and crosses over the first direction. A semiconductor layer is formed on the substrate to fill the areas on the respective sides of the isolation layer.

Abstract: A non-volatile memory is described, including a substrate, a floating gate, a control gate, a source region, and a drain region. A trench is disposed in the substrate, and a step-like recess is located in the substrate beside the trench. The floating gate is disposed on the sidewall of the trench. The control gate is disposed on the substrate between the trench and the step-like recess which extends in the step-like recess. The source region is disposed in the substrate at the bottom of the trench. The drain region is disposed in the substrate at the bottom of the step-like recess.

Abstract: A one time programmable memory including a first memory cell is provided. The first memory cell is disposed on a substrate having a trench disposed therein. The first memory cell includes a floating gate, a select gate, a first doped region, a second doped region and a third doped region. The floating gate is disposed on the sidewall of the trench. The select gate is disposed on the substrate outside the trench. The first doped region is disposed in the substrate at the bottom of the trench. The second and third doped regions are disposed in the substrate on both sides of the trench, and the second doped region is disposed between the floating gate and the select gate.

Abstract: A client/server multimedia system and method are disclosed. The client/server multimedia system and method comprise a remote control and a controlled computer. The controlled computer sends a multimedia data to the remote control according to the operations of the users sent from the remote control, and then the remote control plays the multimedia data or resends the multimedia data to a DVD player, a TV, or a computer, etc. Besides, the remote control may send the audio, the video, or e-mail of the users to the controlled computer, and then the controlled computer resends the audio, the video, or the e-mail of the users to a remote computer over the network.

Abstract: A non-volatile memory is described, including a substrate, a floating gate, a control gate, a source region, and a drain region. A trench is disposed in the substrate, and a step-like recess is located in the substrate beside the trench. The floating gate is disposed on the sidewall of the trench. The control gate is disposed on the substrate between the trench and the step-like recess which extends in the step-like recess. The source region is disposed in the substrate at the bottom of the trench. The drain region is disposed in the substrate at the bottom of the step-like recess.

Abstract: The present invention is to disclose a multimedia interactive system, which comprising a plurality of multimedia interactive clients, a multimedia interactive server, and a multimedia content server connected to an IP (Internet Protocol) network. Each of said multimedia interactive client further comprising a SIP (Session Initiation Protocol) user agent and a web browser. The multimedia interactive server comprising a SIP proxy server for servicing said SIP user agents of said plurality of multimedia interactive clients. And the multimedia content server provides multimedia content, designated in SIP communication by said multimedia interactive server, to said web browsers of said plurality of multimedia interactive clients.

Abstract: A method for manufacturing an anti-punch through semiconductor device is described. The method is applied to a substrate having a plurality of device isolation structures in parallel arrangements and the upper surface of the device isolation structures is protruded from the surface of the substrate. A plurality of conductive layers in parallel arrangement is formed on the substrate and crosses the device isolation structures. A plurality of trench devices is formed between device isolation structures under the conductive layers. Each trench device includes a first conductive doping region at the bottom of the trench. The method further includes forming spacers on the sidewalls of the device isolation structures and the conductive layers. A dopant implant process is then performed by using the spacers as a mask to form a second conductive doping region between adjacent first conductive doping regions.

Abstract: This present invention provides a communication system, which comprises a SIP (Session Initiation Protocol) call server and a virtual SIP user agent. SIP services are provided by said SIP call server for a plurality of internal SIP user agents. The virtual SIP user agent is connecting to said SIP call server and an external SIP proxy server. At least one external SIP account is registered by said virtual SIP user agent to said external SIP proxy server. SIP communication between any of said plurality of internal SIP user agents and an external SIP user agent is exchanged by said virtual SIP user agent.

Abstract: The present invention provides a communication system, which comprising a plurality of user agents, a media relay gateway, a command center, and a session controller. Each user agent is capable of exchanging media stream with another user agent. The media relay gateway is used for receiving and forwarding media stream among said plurality of user agents. Moreover, the command center is used for receiving forwarded media stream from the media relay gateway. And the session controller re-directs and associate exchanged media streams between the plurality of user agents to said media relay gateway according to a monitor command of said command center.

Abstract: A method for forming a buried doped region is provided. A first insulating layer is formed on a substrate and the first insulating layer is patterned to from an opening that extends in a first direction. A buried doped region is formed in the substrate exposed by the opening. Thereafter, a second insulating layer is formed on the substrate to fill the opening. The second insulating layer together with the first insulation layer form a third insulating layer. The third insulating layer is patterned to form an isolation layer that exposes the substrate and the buried doped region. The isolation layer extends in a second direction and crosses over the first direction. A semiconductor layer is formed on the substrate to fill the areas on the respective sides of the isolation layer.

Abstract: A method for fabricating self-aligned conductive lines is provided. A substrate with a plurality of isolation structures is provided. The isolation structures are protrusive from the surface of the substrate, and an active region is defined between two adjacent isolation structures. A plurality of semiconductor devices is formed in the active region. A conductive material layer is then formed on the substrate. Thereafter, a portion of the conductive material layer is removed by using the isolation structures as a removing-stop layer until the surfaces of the isolation structures are exposed and a plurality of conductive lines are formed in a self-aligned manner to electrically connect devices. As the size of the devices is scaled down, the design rule of the lithography process does not limit the size of self-aligned conductive lines. Consequently, the fabricated conductive lines are capable of effectively connecting the semiconductor devices.

Abstract: A method of fabricating conductive lines is described. A substrate having a polysilicon layer thereon is provided. A mask layer having an opening that exposes the polysilicon layer is formed on the polysilicon layer. Then, spacers are formed on the sidewalls of the mask layer. Using the mask layer and the spacers as a mask, a portion of the polysilicon layer is removed until the substrate is exposed. After that, an insulating layer that completely fills the opening is formed over the substrate. The insulating layer has an etching selectivity different from the mask layer. Thereafter, the mask layer is removed to expose the polysilicon layer and then a metal silicide layer is formed on the upper surface of the polysilicon layer.

Abstract: A method for manufacturing an anti-punch through semiconductor device is described. The method is applied to a substrate having a plurality of device isolation structures in parallel arrangements and the upper surface of the device isolation structures is protruded from the surface of the substrate. A plurality of conductive layers in parallel arrangement is formed on the substrate and crosses the device isolation structures. A plurality of trench devices is formed between device isolation structures under the conductive layers. Each trench device includes a first conductive doping region at the bottom of the trench. The method further includes forming spacers on the sidewalls of the device isolation structures and the conductive layers. A dopant implant process is then performed by using the spacers as a mask to form a second conductive doping region between adjacent first conductive doping regions.

Abstract: A method of manufacturing a non-volatile memory cell includes forming a bottom dielectric layer and a charge trapping layer on a substrate sequentially. The electron trapping layer is patterned to form a trench exposing a portion of the bottom dielectric layer. A top dielectric layer is formed over the substrate and covers the electron trapping layer and the exposed bottom dielectric layer. A conductive layer is then formed on the top dielectric layer. The conductive layer, the top dielectric layer, the electron trapping layer and the bottom dielectric layer are patterned to form a stacked structure, wherein a width of the stacked structure is larger than a width of the trench. A source/drain region is formed in the substrate adjacent to the edges of the stacked structure. Because the electron trapping layer of the memory cell is divided into two isolation structures according to the invention, it is adapted for the integration of devices and for long-time operation.

Abstract: A method of fabricating a flash memory is provided. The method includes forming a mask layer with first openings on the substrate. A tunneling dielectric layer is formed at bottom in the first openings. Strips of conductive spacers are formed on sidewalls of the first openings, and source/drain regions are formed in the substrate within the first openings. The strips of conductive spacers are patterned to form floating gates. A first inter-gate dielectric layer is formed over the substrate. Control gates are formed on the substrate to fill the first openings. Mask layer is removed to form second openings. Gate dielectric layer is formed at bottom of second openings, and second inter-gate dielectric layer is formed on the sidewalls of floating gates, and the sidewalls and top surface of the control gates. Word lines are formed to fill second openings disposed between the floating gates and cover the control gates.

Abstract: A method and system for a communication network architecture for passing multi-media data streams between two heterogeneous IP (Internet Protocol) networks, where the networks include a plurality of firewalls and NAT (Network Address Translation) devices. The architecture can include: (a) a session control server (b) a logger service to capture and to digitally store communication streams; (c) a network client service to initiate communication requests; (d) a network client service to receive communication requests; and (e) an administration service to control other network services and to monitor and log the communication quality and to generate communication traffic reports. The session control server can include: (f) a NAT device and firewall device traversal service; (g) a communication encryption service; (h) a bandwidth control service; (i) a quality monitoring service; (j) a proxy server ; (k) a registrar server; and any defined services in the architecture.

Abstract: A method of manufacturing of a photodiode is provided. The photodiode is formed on a substrate of a first conductive type. First, an isolation structure is formed in the substrate to define a photosensitive area in the substrate. Thereafter, trenches are formed in the substrate. Next, a doped layer of a second conductive type is formed on the substrate. The doped layer covers at least the inner wall of the trenches and a top portion of the substrate. The method of fabricating the photodiode can reduce overall processing time and cost and improve production efficiency.

Abstract: A method of manufacturing a non-volatile memory cell includes forming a bottom dielectric layer and a charge trapping layer on a substrate sequentially. The electron trapping layer is patterned to form a trench exposing a portion of the bottom dielectric layer. A top dielectric layer is formed over the substrate and covers the electron trapping layer and the exposed bottom dielectric layer. A conductive layer is then formed on the top dielectric layer. The conductive layer, the top dielectric layer, the electron trapping layer and the bottom dielectric layer are patterned to form a stacked structure, wherein a width of the stacked structure is larger than a width of the trench. A source/drain region is formed in the substrate adjacent to the edges of the stacked structure. Because the electron trapping layer of the memory cell is divided into two isolation structures according to the invention, it is adapted for the integration of devices and for long-time operation.