Patents by Inventor Suagata Das Purkayastha

Suagata Das Purkayastha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160026579
    Abstract: A cache controller having a cache supported by a non-volatile memory element manages metadata operations by defining a mathematical relationship between a cache line in a data store exposed to a host system and a location identifier associated with an instance of the cache line in the non-volatile memory. The cache controller maintains most recently used bit maps identifying data in the cache, as well as a data characteristic bit map identifying data that has changed since it was added to the cache. The cache controller maintains a most recently used bit map to replace the recently map at an appropriate time and a fresh bitmap tracks the most recently used bit map. The cache controller uses a collision bitmap, an imposter index and a quotient to modify cache lines stored in the non-volatile memory element.
    Type: Application
    Filed: July 22, 2014
    Publication date: January 28, 2016
    Inventors: Sumanesh Samanta, Suagata Das Purkayastha, Mark Ish, Horia Simionescu, Luca Bert
  • Publication number: 20160004644
    Abstract: A storage controller maintaining a cache manages modified data flush operations. A set-associative map or relationship between individual cache lines in the cache and a corresponding portion of the host managed or source data store is generated in such a way that a quotient can be used to identify modified data in the cache in the order of the source data's logical block addresses. The storage controller uses a collision bitmap, a dirty bit map and a flush table when flushing data from the cache. The storage controller selects a quotient and identifies modified cache lines in the cache identified by the quotient. As long as the quotient remains the same, the storage controller flushes or transfers the modified cache lines to the data store. Otherwise, when the quotient is not the same, the data in the cache is skipped. A linked list is used to traverse skipped cache lines.
    Type: Application
    Filed: July 2, 2014
    Publication date: January 7, 2016
    Inventors: Sumanesh Samanta, Mark Ish, Suagata Das Purkayastha