Abstract: TeraHertz signal generation system based on traveling-wave oscillators providing extraction of orders of magnitude higher oscillation frequencies resulting in frequency multipliers and THz transceivers that can generate, transmit and sense THz frequency signals for sensing/imaging.

Abstract: TeraHertz signal generation system based on traveling-wave oscillators providing extraction of orders of magnitude higher oscillation frequencies resulting in frequency multipliers and THz transceivers that can generate, transmit and sense THz frequency signals for sensing/imaging.

Abstract: Communications data interface sampling systems configured effectively with fully-symmetric dual-loop traveling wave oscillators providing high frequency evenly spaced multiple phases to represent analog-in-nature continuous signals as digital stream of samples with best approximation to the original signal.

Abstract: Communications data interface sampling systems configured effectively with fully-symmetric dual-loop traveling wave oscillators providing high frequency evenly spaced multiple phases to represent analog-in-nature continuous signals as digital stream of samples with best approximation to the original signal.

Abstract: An analog-to-digital (ADC) converter is disclosed that uses aspects of a single-slope ramp ADC, but with jump steps in the ramp voltage to increase speed. A programmable ramp generator can be used to dynamically modify a voltage level associated with the jump step. By programming a voltage level of the jump, a user can dynamically modify the speed of the ADC during operation.

Abstract: TeraHertz signal generation system based on traveling-wave oscillators providing extraction of orders of magnitude higher oscillation frequencies resulting in frequency multipliers and THz transceivers that can generate, transmit and sense THz frequency signals for sensing/imaging.

Abstract: A Force-Mode Distributed Wave Oscillator (FMDWO) that provides accurate multiple phases of an oscillation, a Force Mode Distributed Wave Antenna as a radiating element, a Force-Mode Distributed Oscillator Amplifier (FMDOA) and an array of amplifiers capable of operating as a beam forming phased-array antenna driver. Two distinct force mode mechanisms, one delay-based and the other geometry-based, utilizing inverter amplifiers, inject an oscillation on independent conductor loops or rings via transmission lines forming a differential transmission medium for the oscillation wave. Once the oscillation wave is initiated through the forcing mechanisms, the oscillations continue uninterrupted independent of any external triggering.

Abstract: TeraHertz signal generation system based on traveling-wave oscillators providing extraction of orders of magnitude higher oscillation frequencies resulting in frequency multipliers and THz transceivers that can generate, transmit and sense THz frequency signals for sensing/imaging.

Abstract: An analog-to-digital (ADC) converter is disclosed that uses aspects of a single-slope ramp ADC, but with jump steps in the ramp voltage to increase speed. A look-ahead controller can cause a ramped voltage level to jump step and detect the number of analog input signals impacted due to the jump step. If the detected number is below a predetermined threshold, the ramp can be maintained from the new voltage level after the jump. If the detected number is above the predetermined threshold, the ramped voltage level can be returned to its original voltage level and trajectory. Thus, jump steps can be used to increase speed, but dynamic testing can be performed to ensure that error rates due to the jump step are minimized.

Abstract: Integrated mobile phone and medical implant system. The disclosed system integrates the available electronic resources that already exist in compact and portable devices, such as any generic mobile phone, with a body implantable medical device such that the sensory data obtained from the implant device is transmitted through an electronic umbilical cord directly to the mobile device where the data is analyzed and presented in a user-friendly manner to the user/patient and/or transmitted wirelessly to a remote location for further action, if necessary, without the need for additional equipment. With the switch of software application from a drop-down menu, the mobile device of the system functions both as a normal mobile phone, as a medical monitoring device, or both simultaneously without any interference between the two modes of operations. Method for using the integrated system is also disclosed.

Abstract: A Force-Mode Distributed Wave Oscillator (FMDWO) that provides accurate multiple phases of an oscillation, a Force Mode Distributed Wave Antenna as a radiating element, a Force-Mode Distributed Oscillator Amplifier (FMDOA) and an array of amplifiers capable of operating as a beam forming phased-array antenna driver. Two distinct force mode mechanisms, one delay-based and the other geometry-based, utilizing inverter amplifiers, inject an oscillation on independent conductor loops or rings via transmission lines forming a differential transmission medium for the oscillation wave. Once the oscillation wave is initiated through the forcing mechanisms, the oscillations continue uninterrupted independent of any external triggering.

Abstract: Integrated mobile phone and medical implant system. The disclosed system integrates the available electronic resources that already exist in compact and portable devices, such as any generic mobile phone, with a body implantable medical device such that the sensory data obtained from the implant device is transmitted through an electronic umbilical cord directly to the mobile device where the data is analyzed and presented in a user-friendly manner to the user/patient and/or transmitted wirelessly to a remote location for further action, if necessary, without the need for additional equipment. With the switch of software application from a drop-down menu, the mobile device of the system functions both as a normal mobile phone, as a medical monitoring device, or both simultaneously without any interference between the two modes of operations. Method for using the integrated system is also disclosed.

Abstract: An analog-to-digital (ADC) converter is disclosed that uses aspects of a single-slope ramp ADC, but with jump steps in the ramp voltage to increase speed. A programmable ramp generator can be used to dynamically modify a voltage level associated with the jump step. By programming a voltage level of the jump, a user can dynamically modify the speed of the ADC during operation.

Abstract: An analog-to-digital (ADC) converter is disclosed that uses aspects of a single-slope ramp ADC, but with jump steps in the ramp voltage to increase speed. A look-ahead controller can cause a ramped voltage level to jump step and detect the number of analog input signals impacted due to the jump step. If the detected number is below a predetermined threshold, the ramp can be maintained from the new voltage level after the jump. If the detected number is above the predetermined threshold, the ramped voltage level can be returned to its original voltage level and trajectory. Thus, jump steps can be used to increase speed, but dynamic testing can be performed to ensure that error rates due to the jump step are minimized.

Abstract: Methods for forming conductors and global bus configurations for reducing an interference signal from electromagnetic interference (EMI) source are provided. First and second conductor lines are formed on an integrated circuit in a twisted pair configuration. A differential amplifier is formed on the integrated circuit and coupled to each of the first and second conductor lines. The first and second signals are respectively transmitted through the first and second conductor lines and are modified by the interference signal. The modified first and second signals are differentially amplified by the differential amplifier so that the interference signal is substantially cancelled.

Abstract: Improved column sample-and-hold (CSH) circuitry particularly useful in a CMOS imager is disclosed. In the improved circuitry layout, the overall column height of the CSH circuitry is reduced by providing a plurality of pairs of sampling and reference capacitors in a vertical stack over the columns that the capacitors service. The number of pairs provided in the vertical stack is subject to optimization, and for a given set of design constraints, a certain form factors can prove to be optimal. No modification needs to be made to the pixel array (such as pixel pitch), and the sensing circuitry otherwise requires no electrical or process modifications as the values for the capacitances as well as other design constraint are preserved. However, the vertical stacking of the plurality of pairs of capacitors reduces the overall column height (CH), which conserves layout space on the CMOS imager integrated circuit.

Abstract: Improved column sample-and-hold (CSH) circuitry particularly useful in a CMOS imager is disclosed. In the improved circuitry layout, the overall column height of the CSH circuitry is reduced by providing a plurality of pairs of sampling and reference capacitors in a vertical stack over the columns that the capacitors service. The number of pairs provided in the vertical stack is subject to optimization, and for a given set of design constraints, a certain form factors can prove to be optimal. No modification needs to be made to the pixel array (such as pixel pitch), and the sensing circuitry otherwise requires no electrical or process modifications as the values for the capacitances as well as other design constraint are preserved. However, the vertical stacking of the plurality of pairs of capacitors reduces the overall column height (CH), which conserves layout space on the CMOS imager integrated circuit.

Abstract: Improved designs for a capacitor, and particularly the sensing and references capacitors used in a column sample-and-hold (CSH) circuitry in a CMOS imager, are disclosed that minimize layout area. In-one embodiment, an additional plate layer (e.g., formed in metal 1) is provided above the traditional poly 2-poly 1 capacitor, which additional plate is shorted to traditional poly 1 bottom plate. This adds an additional area capacitance (Ca1) which is additive to the capacitance formed by the poly 2-poly 1 capacitor (Cp) to increase the total capacitance, which thus allows the capacitor to be made smaller in layout area. In another embodiment, an additional piece of metal 1 contacts the poly 2 top capacitor plate, such that a sidewall capacitance (Csw1) is defined between the sidewalls of the metal 1 pieces, which is again additive to the total capacitance. These sidewalls can be interdigitized to increase the area of the sidewall capacitance. In yet another embodiment, yet another plate layer (e.g.

Abstract: Improved column sample-and-hold (CSH) circuitry particularly useful in a CMOS imager is disclosed. In the improved circuitry layout, the overall column height of the CSH circuitry is reduced by providing a plurality of pairs of sampling and reference capacitors in a vertical stack over the columns that the capacitors service. The number of pairs provided in the vertical stack is subject to optimization, and for a given set of design constraints, a certain form factors can prove to be optimal. No modification needs to be made to the pixel array (such as pixel pitch), and the sensing circuitry otherwise requires no electrical or process modifications as the values for the capacitances as well as other design constraint are preserved. However, the vertical stacking of the plurality of pairs of capacitors reduces the overall column height (CH), which conserves layout space on the CMOS imager integrated circuit.