Patents by Inventor Subhajit Dasgupta

Subhajit Dasgupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210343064
    Abstract: Briefly, in accordance with one or more embodiments, a processor receives an incoming data stream that includes alpha channel data, and a memory stores an application programming interface (API). The API is to route the alpha channel data to a fixed point blending unit to perform one or more blending operations using fixed point representation of the alpha channel data. The API is further to route the incoming data stream to a floating point blending unit to perform operations involving floating point representation of the incoming data.
    Type: Application
    Filed: May 17, 2021
    Publication date: November 4, 2021
    Applicant: Intel Corporation
    Inventors: Abhishek R. Appu, Prasoonkumar Surti, Srivallaba Mysore, Subhajit Dasgupta, Hiroshi Akiba, Eric J. Hoekstra, Linda L. Hurd, Travis T. Schluessler, Daren J. Schmidt
  • Patent number: 11132351
    Abstract: Example implementations relate to executing transactions based on success or failure of the transactions. For example, a management module of a computing system can execute a transaction that requests access to system resources and determine if the transaction fails or succeeds. The management module can execute a first set of actions, in response to determining that the transaction succeeds, and execute a second set of actions, in response to determining that the transactions fails.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: September 28, 2021
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Subhajit Dasgupta, Charles Scot Greenidge
  • Publication number: 20210240626
    Abstract: A system to facilitate infrastructure management is described.
    Type: Application
    Filed: January 30, 2020
    Publication date: August 5, 2021
    Inventors: SUBHAJIT DASGUPTA, Charles E. Fowler, Michelle Frolik, Charles Greenidge, Jerry Harrow, Sandesh V. Madhyastha, Clifford A. McCarthy, Abhay Padlia, Rajeev Pandey, Jonathan M. Sauer, Geoffery Schunicht, Latha Srinivasan, Gary L. Thunquest
  • Publication number: 20210243088
    Abstract: A system to facilitate infrastructure management is described.
    Type: Application
    Filed: January 30, 2020
    Publication date: August 5, 2021
    Inventors: Subhajit Dasgupta, Charles E. Fowler, Michelle Frolik, Charles Greenidge, Jerry Harrow, Sandesh V. Madhyastha, Clifford A. McCarthy, Abhay Padlia, Rajeev Pandey, Jonathan M. Sauer, Geoffery Schunicht, Latha Srinivasan, Gary L. Thunquest
  • Publication number: 20210191773
    Abstract: A system to facilitate infrastructure management is described. The system includes one or more processors and a non-transitory machine-readable medium storing instructions that, when executed, cause the one or more processors to execute an infrastructure management controller to receive first monitoring data indicating a first infrastructure condition occurring at an on-premise infrastructure controller, determine a first load state of the on-premise infrastructure controller based on the first infrastructure condition and adjust a consistency level of the on-premise infrastructure controller to a first level of the consistency based on the first state.
    Type: Application
    Filed: December 19, 2019
    Publication date: June 24, 2021
    Inventors: Subhajit Dasgupta, Charles E. Fowler, Michelle Frolik, Charles Greenidge, Jerry Harrow, Sandesh V. Madhyastha, Clifford A. McCarthy, Abhay Padlia, Rajeev Pandey, Jonathan M. Sauer, Geoffery Schunicht, Latha Srinivasan, Gary L. Thunquest
  • Publication number: 20210191786
    Abstract: A system to facilitate infrastructure management is described. The system includes one or more processors and a non-transitory machine-readable medium storing instructions that, when executed, cause the one or more processors to execute an infrastructure management controller to automatically balance utilization of infrastructure resources between a plurality of on-premise infrastructure controllers.
    Type: Application
    Filed: December 18, 2019
    Publication date: June 24, 2021
    Inventors: Subhajit Dasgupta, Charles E. Fowler, Michelle Frolik, Charles Greenidge, Jerry Harrow, Sandesh V. Madhyastha, Clifford A. McCarthy, Abhay Padlia, Rajeev Pandey, Jonathan M. Sauer, Geoffery Schunicht, Latha Srinivasan, Gary L. Thunquest
  • Publication number: 20210173716
    Abstract: A system to facilitate infrastructure management is described. The system includes one or more processors and a non-transitory machine-readable medium storing instructions that, when executed, cause the one or more processors to execute an infrastructure management controller to receive a request to provide infrastructure management services and generate a mapping between at least one instance of the infrastructure management controller and one or more resource instances at one or more on-premise infrastructure controller instances to provide the cloud based infrastructure management services, wherein the request includes one or more configuration parameters.
    Type: Application
    Filed: December 9, 2019
    Publication date: June 10, 2021
    Inventors: Subhajit Dasgupta, Charles E. Fowler, Michelle Frolik, Charles Greenidge, Jerry Harrow, Sandesh V. Madhyastha, Clifford A. McCarthy, Abhay Padlia, Rajeev Pandey, Jonathan M. Sauer, Geoffery Schunicht, Latha Srinivasan, Gary L. Thunquest
  • Publication number: 20210176309
    Abstract: A system to facilitate infrastructure management is described. The system includes a plurality of management controllers each having a control function of a plurality of infrastructure devices and a state cache storing a state of the plurality of infrastructure devices, including a first management controller to initiate an operation to be performed on a first set of resources. The system also includes a plurality of infrastructure controllers, each having a state repository to maintain a state function of the plurality of infrastructure devices, including a first infrastructure controller associated with the first set of resources to perform the operation on the first set of resources, update a first state repository including an updated state of the first set of resources in response to the operation and broadcast the updated state of the first set of resources to each of the plurality of management controllers.
    Type: Application
    Filed: December 9, 2019
    Publication date: June 10, 2021
    Inventors: Subhajit Dasgupta, Charles E. Fowler, Michelle Frolik, Charles Greenidge, Jerry Harrow, Sandesh V. Madhyastha, Clifford A. McCarthy, Abhay Padlia, Rajeev Pandey, Jonathan M. Sauer, Geoffery Schunicht, Latha Srinivasan, Gary L. Thunquest
  • Patent number: 11010953
    Abstract: Briefly, in accordance with one or more embodiments, a processor receives an incoming data stream that includes alpha channel data, and a memory stores an application programming interface (API). The API is to route the alpha channel data to a fixed point blending unit to perform one or more blending operations using fixed point representation of the alpha channel data. The API is further to route the incoming data stream to a floating point blending unit to perform operations involving floating point representation of the incoming data.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: May 18, 2021
    Assignee: Intel Corporation
    Inventors: Abhishek R. Appu, Prasoonkumar Surti, Srivallaba Mysore, Subhajit Dasgupta, Hiroshi Akiba, Eric J. Hoekstra, Linda L. Hurd, Travis T. Schluessler, Daren J. Schmidt
  • Patent number: 10887408
    Abstract: A method of remotely accessing data on a network communication device including submitting a request for data on a network communication device located in a data center from a remote location. The method further including accessing remotely the network communication device located in the data center, collecting the data in the request from the network communication device located in the data center, filtering a user parameter from the data, and providing filtered data to the remote location.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: January 5, 2021
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Subhajit Dasgupta, Alexander Kramer, Fred Kuhns
  • Publication number: 20200410749
    Abstract: One embodiment provides for a graphics processing unit comprising a processing cluster to perform coarse pixel shading and output shaded coarse pixels for processing by a pixel processing pipeline and a render cache to store coarse pixel data for input to or output from pixel processing pipeline.
    Type: Application
    Filed: July 7, 2020
    Publication date: December 31, 2020
    Applicant: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Subhajit Dasgupta, Srivallaba Mysore, Michael J. Norris, Vasanth Ranganathan, Joydeep Ray
  • Publication number: 20200279199
    Abstract: Example implementations relate to generating a completion prediction of a task. A computing device may comprise a processing resource and a memory resource storing non-transitory machine-readable instructions to cause the processing resource to receive task data about a task, analyze the task data using machine learning to generate a data model for the task, and generate a completion prediction based on the generated data model for the task.
    Type: Application
    Filed: February 28, 2019
    Publication date: September 3, 2020
    Inventors: Subhajit Dasgupta, Alexander Kramer, Robert R. Teisberg
  • Patent number: 10706616
    Abstract: One embodiment provides for a graphics processing unit comprising a processing cluster to perform coarse pixel shading and output shaded coarse pixels for processing by a pixel processing pipeline and a render cache to store coarse pixel data for input to or output from pixel processing pipeline.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: July 7, 2020
    Assignee: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Subhajit Dasgupta, Srivallaba Mysore, Michael J. Norris, Vasanth Ranganathan, Joydeep Ray
  • Publication number: 20200053173
    Abstract: A method of remotely accessing data on a network communication device including submitting a request for data on a network communication device located in a data center from a remote location. The method further including accessing remotely the network communication device located in the data center, collecting the data in the request from the network communication device located in the data center, filtering a user parameter from the data, and providing filtered data to the remote location.
    Type: Application
    Filed: August 7, 2018
    Publication date: February 13, 2020
    Inventors: Subhajit Dasgupta, Alexander Kramer, Fred Kuhns
  • Patent number: 10262393
    Abstract: Methods and apparatus relating to Multi-Sample Anti-Aliasing (MSAA) memory bandwidth reduction for sparse sample per pixel utilization are described. In an embodiment, Multi-Sample Anti-Aliasing (MSAA) logic generates render subspan plane information based on data stored in a cacheline. One or more read operations to memory are suppressed based on a determination that the cacheline is in a clear state. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: April 16, 2019
    Assignee: Intel Corporation
    Inventors: Abhishek R. Appu, Prasoonkumar Surti, Subhajit Dasgupta
  • Publication number: 20180308272
    Abstract: Briefly, in accordance with one or more embodiments, a processor receives an incoming data stream that includes alpha channel data, and a memory stores an application programming interface (API). The API is to route the alpha channel data to a fixed point blending unit to perform one or more blending operations using fixed point representation of the alpha channel data. The API is further to route the incoming data stream to a floating point blending unit to perform operations involving floating point representation of the incoming data.
    Type: Application
    Filed: April 21, 2017
    Publication date: October 25, 2018
    Inventors: Abhishek R. Appu, Prasoonkumar Surti, Srivallaba Mysore, Subhajit Dasgupta, Hiroshi Akiba, Eric J. Hoekstra, Linda L. Hurd, Travis T. Schluessler, Daren J. Schmidt
  • Publication number: 20180308280
    Abstract: One embodiment provides for a graphics processing unit comprising a processing cluster to perform coarse pixel shading and output shaded coarse pixels for processing by a pixel processing pipeline and a render cache to store coarse pixel data for input to or output from pixel processing pipeline.
    Type: Application
    Filed: April 21, 2017
    Publication date: October 25, 2018
    Applicant: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Subhajit Dasgupta, Srivallaba Mysore, Michael J. Norris, Vasanth Ranganathan, Joydeep Ray
  • Publication number: 20180253462
    Abstract: Example implementations relate to executing transactions based on success or failure of the transactions. For example, a management module of a computing system can execute a transaction that requests access to system resources and determine if the transaction fails or succeeds. The management module can execute a first set of actions, in response to determining that the transaction succeeds, and execute a second set of actions, in response to determining that the transactions fails.
    Type: Application
    Filed: September 28, 2015
    Publication date: September 6, 2018
    Inventors: Subhajit Dasgupta, Charles Scot Greenidge
  • Publication number: 20180189926
    Abstract: Methods and apparatus relating to Multi-Sample Anti-Aliasing (MSAA) memory bandwidth reduction for sparse sample per pixel utilization are described. In an embodiment, Multi-Sample Anti-Aliasing (MSAA) logic generates render subspan plane information based on data stored in a cacheline. One or more read operations to memory are suppressed based on a determination that the cacheline is in a clear state. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: December 29, 2016
    Publication date: July 5, 2018
    Applicant: Intel Corporation
    Inventors: Abhishek R. Appu, Prasoonkumar Surti, Subhajit Dasgupta
  • Publication number: 20180107602
    Abstract: Methods and apparatus relating to techniques to improve/optimize latency and bandwidth efficiency for read modify write operations when a read operation is requested to a partially modified write only cacheline are described. In an embodiment, a first cache stores data from one or more cachelines of a second cache in response to a read hit write only operation (e.g., instead of sending the data to main memory). Write accumulate logic merges the stored data with one or more write operations. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: October 13, 2016
    Publication date: April 19, 2018
    Applicant: Intel Corporation
    Inventors: Subhajit Dasgupta, Abhishek R. Appu, Prasoonkumar Surti