Patents by Inventor Subhash Shinde

Subhash Shinde has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230231784
    Abstract: A system and method for diagnosing connection and communication in an industrial machine. The electronic processing system includes a CAN bus, an ethernet network, and a plurality of devices connected to the CAN bus and the ethernet network. The plurality of devices includes at least one controller programmed to run one or more software applications. A connectivity check is performed to obtain CAN connection status data and ethernet connection status data for the plurality of devices. The CAN connection status data and the ethernet connection status data is analyzed to determine a likely cause of a device connection issue. A solution to the device connection issue is output to a user based on the analyzed data.
    Type: Application
    Filed: January 20, 2022
    Publication date: July 20, 2023
    Inventors: Curtis P. Ritter, Devin Mangus, Joseph A. Bell, Murtaza Hita, Arjun Subhash Shinde, Jitender Kumar Chandwani
  • Publication number: 20070252288
    Abstract: Under the present invention, a semiconductor chip is electrically connected to a substrate (e.g., organic, ceramic, etc.) by an interposer structure. The interposer structure comprises an elastomeric, compliant material that includes metallurgic through connections having a predetermined shape. In a typical embodiment, the metallurgical through connections electrically connect an under bump metallization of the semiconductor chip to a top surface metallization of the substrate. By utilizing the interposer structure in accordance with the present invention, the problems associated with previous semiconductor module designs are alleviated.
    Type: Application
    Filed: July 3, 2007
    Publication date: November 1, 2007
    Inventors: MUKTA FAROOQ, John Knickerbocker, Frank Pompeo, Subhash Shinde
  • Publication number: 20060182397
    Abstract: An optoelectronic assembly for an electronic system includes a thermally conductive, metallized transparent substrate having a first surface and an opposite second surface. A support chip set is bonded to the second surface of the transparent substrate. A first substrate is in communication with the transparent substrate via the metallized second surface and support chip set therebetween. A second substrate is in communication with the second surface of the first substrate and is configured for mounting at least one of data processing, data switching and data storage chips. An optoelectronic transducer is in signal communication with the support chip set, and an optical signaling medium having one end with an optical fiber array aligned with the transducer is substantially normal to the first surface of the transparent substrate. The support chip set and the transducer share a common thermal path for cooling.
    Type: Application
    Filed: April 11, 2006
    Publication date: August 17, 2006
    Applicant: International Business Machines Corporation
    Inventors: Alan Benner, How Lin, Frank Pompeo, Subhash Shinde
  • Publication number: 20060009022
    Abstract: A method for forming an interconnect structure for a semiconductor device includes defining a via in a passivation layer so as expose a top metal layer in the semiconductor device. A seed layer is formed over the passivation layer, sidewalls of the via, and the top metal layer. A barrier layer is formed over an exposed portion of the seed layer, the exposed portion defined by a first patterned opening. The semiconductor device is annealed so as to cause atoms from the barrier layer to diffuse into the seed layer thereunderneath, wherein the annealing causes diffused regions of the seed layer to have an altered electrical resistivity and electrode potential with respect to undiffused regions of the seed layer.
    Type: Application
    Filed: September 12, 2005
    Publication date: January 12, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kamalesh Srivastava, Subhash Shinde, Tien-Jen Cheng, Sarah Knickerbocker, Roger Quon, William Sablinski, Julie Biggs, David Eichstadt, Jonathan Griffith
  • Publication number: 20050208748
    Abstract: A method for forming an interconnect structure for a semiconductor device includes defining a via in a passivation layer so as expose a top metal layer in the semiconductor device. A seed layer is formed over the passivation layer, sidewalls of the via, and the top metal layer. A barrier layer is formed over an exposed portion of the seed layer, the exposed portion defined by a first patterned opening. The semiconductor device is annealed so as to cause atoms from the barrier layer to diffuse into the seed layer thereunderneath, wherein the annealing causes diffused regions of the seed layer to have an altered electrical resistivity and electrode potential with respect to undiffused regions of the seed layer.
    Type: Application
    Filed: March 17, 2004
    Publication date: September 22, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kamalesh Srivastava, Subhash Shinde, Tien-Jen Cheng, Sarah Knickerbocker, Roger Quon, William Sablinski, Julie Biggs, David Eichstadt, Jonathan Griffith
  • Publication number: 20050156310
    Abstract: An optoelectronic assembly for an electronic system includes a transparent substrate having a first surface and an opposite second surface, the transparent substrate being thermally conductive and being metallized on the surface. A support electronic chip set is configured for at least one of providing multiplexing, demultiplexing, coding, decoding and optoelectronic transducer driving and receive functions and is bonded to the second surface of the transparent substrate. A first substrate having a first surface and an opposite second surface, is in communication with the transparent substrate via the metallized second surface and support chip set therebetween. A second substrate is in communication with the second surface of the first substrate and is configured for mounting at least one of data processing, data switching and data storage chips.
    Type: Application
    Filed: January 14, 2004
    Publication date: July 21, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Alan Benner, How Lin, Frank Pompeo, Subhash Shinde
  • Publication number: 20050110160
    Abstract: Under the present invention, a semiconductor chip is electrically connected to a substrate (e.g., organic, ceramic, etc.) by an interposer structure. The interposer structure comprises an elastomeric, compliant material that includes metallurgic through connections having a predetermined shape. In a typical embodiment, the metallurgical through connections electrically connect an under bump metallization of the semiconductor chip to a top surface metallization of the substrate. By utilizing the interposer structure in accordance with the present invention, the problems associated with previous semiconductor module designs are alleviated.
    Type: Application
    Filed: November 25, 2003
    Publication date: May 26, 2005
    Applicant: International Business Machines Corporation
    Inventors: Mukta Faroog, John Knickerbocker, Frank Pompeo, Subhash Shinde
  • Publication number: 20050078376
    Abstract: Optical cubes and optical cube assemblies for directing optical beams are provided. The optical cubes are optically transparent modules that can be adapted to reflect, transmit, and/or partially reflect and transmit optical beams. The optical cubes may include bi-direction or multi-direction beam directing elements for directing optical beams. The optical cube assemblies may include flexible chip assemblies attached to optical cubes. The chip assemblies may include vertical cavity surface-emitting lasers for emitting optical beams or receivers for receiving optical beams mounted on a flexible and electrical interconnect mounting assembly.
    Type: Application
    Filed: November 19, 2004
    Publication date: April 14, 2005
    Inventors: Dinesh Gupta, Brenda Peterson, Mark Pierson, Eugen Schenfeld, Subhash Shinde
  • Publication number: 20050025434
    Abstract: An optoelectronic assembly for a computer system includes an electronic chip(s), a substrate, an electrical signaling medium, an optoelectronic transducer, and an optical coupling guide. The electronic chip(s) is in communication with the substrate, which is in communication with a first end of the electrical signaling medium. A second end of the electrical signaling medium is in communication with the optoelectronic transducer, and includes the optical coupling guide for aligning an optical signaling medium with the optoelectronic transducer. An electrical signal from the electronic chip is communicated to the optoelectronic transducer via the substrate and the electrical signaling medium. The optical transducer and electronic chip(s) share a common heat spreader, and communication to other groups of electronic chip(s) is done without the need for communication via a second level electrical package.
    Type: Application
    Filed: July 31, 2003
    Publication date: February 3, 2005
    Applicant: International Business Machines Corporation
    Inventors: Alan Benner, Evan Colgan, How Lin, John Magerlein, Frank Pompeo, Subhash Shinde, Daniel Stigliani