Patents by Inventor Subhiksha RAVISUNDAR

Subhiksha RAVISUNDAR has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • MULTI-LEVEL CACHE DATA TRACKING AND ISOLATION
    Publication number: 20240104022
    Abstract: An example of an apparatus may include a first cache organized as two or more portions, a second cache, and circuitry coupled to the first cache and the second cache to determine a designated portion allocation for data transferred from the first cache to the second cache, and track the designated portion allocation for the data transferred from the first cache to the second cache. Other examples are disclosed and claimed.
    Type: Application
    Filed: September 27, 2022
    Publication date: March 28, 2024
    Applicant: Intel Corporation
    Inventors: Aneesh Aggarwal, Georgii Tkachuk, Subhiksha Ravisundar, Youngsoo Choi, Niall McDonnell
  • CACHE LINE INVALIDATION TECHNOLOGIES
    Publication number: 20220214973
    Abstract: Examples described herein relate to a device issuing a single command to request invalidation of multiple cache lines associated with a memory address range in a cache device. In some examples, the cache device is associated with the processor. In some examples, the processor comprises one or more of a central processing unit (CPU), core, or graphics processing unit (GPU).
    Type: Application
    Filed: March 29, 2022
    Publication date: July 7, 2022
    Inventors: Bruce RICHARDSON, Niall D. MCDONNELL, Subhiksha RAVISUNDAR